MMC2107 - Freescale Semiconductor

Freescale Semiconductor, Inc.
System Memory Map
Register Map
Address Register Name Bit Number
Bit 7 6 5 4 3 2 1 Bit 0
nc...
Freescale Semiconductor, I
0x00ce_001f
0x00cf_001f
0x00ce_0020
↓
0x00ce_ffff
0x00cf_0030
↓
0x00cf_ffff
Timer Test Register
(TIMTST)
See page 321.
Unimplemented
Non-Volatile Memory FLASH (CMFR)
0x00d0_0000
0x00d0_0001
0x00d0_0002
0x00d0_0003
CMFR Module
Configuration Register
(CMFRMCR)
See page 188.
Read: 0 0 0 0 0 0 0 0
Write:
Reset: 0 0 0 0 0 0 0 0
Read:
Write:
Bit 7 6 5 4 3 2 1 Bit 0
Access results in the module generating an access termination transfer error.
Bit 31 30 29 28 27 26 25 Bit 24
FSTOP
FDBG
0
EME SIE LOCKCTL DIS RSVD24
Reset: 0 0 0 Note 1 0 0 Note 1 0
Read:
Write:
Bit 23 22 21 20 19 18 17 Bit 16
SUPV7 SUPV6 SUPV5 SUPV4 SUPV3 SUPV2 SUPV1 SUPV0
Reset: 1 1 1 1 1 1 1 1
Read:
Write:
Bit 15 14 13 12 11 10 9 Bit 8
DATA7 DATA6 DATA5 DATA4 DATA3 DATA2 DATA1 DATA0
Reset: 0 0 0 0 0 0 0 0
Read:
Write:
Bit 7 6 5 4 3 2 1 Bit 0
PROTECT7 PROTECT6 PROTECT5 PROTECT4 PROTECT3 PROTECT2 PROTECT1 PROTECT0
Reset: 1 1 1 1 1 1 1 1
Notes:
1. Reset state is defined by reset override.
P = Current pin state U = Unaffected = Writes have no effect and the access terminates without a transfer error exception.
Figure 2-2. Register Summary (Sheet 32 of 34)
MMC2107 – Rev. 2.0
Technical Data
MOTOROLA System Memory Map 85
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