Fast Models Reference Manual - ARM Information Center

Processor Components
4.13 ARM1176CT
Figure 4-14 shows a view of the ARM1176CT component in System Canvas. This component
is based on r0p4 of the ARM1176JZF-S processor.
This component is written in C++.
Figure 4-14 ARM1176CT in System Canvas
4.13.1 Ports
Table 4-38 provides a brief description of the ports for the ARM1176CT component. Refer to
the processor technical reference manual for more details.
Name Port protocol Type Description
clk_in ClockSignal slave clock input
Table 4-38 ARM1176CT ports
pvbus_m PVBus master master port for all memory accesses
reset Signal slave asynchronous reset signal input
irq Signal slave asynchronous IRQ signal input
fiq Signal slave asynchronous FIQ signal input
pmuirq Signal master performance monitoring unit IRQ output
dmairq Signal master normal DMA interrupt output
dmasirq Signal master secure DMA interrupt output
dmaexterrirq Signal master DMA error interrupt output
vic_addr ValueState slave address input for connection to PL192 VIC
vic_ack Signal master acknowledge signal output for PL192 VIC
ticks InstructionCount master output that can be connected to a visualization
component
4.13.2 Additional protocols
The ARM1176CT component has no additional protocols.
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