Fast Models Reference Manual - ARM Information Center

Peripheral and Interface Components
5.7 CADI sync watchpoints
Watchpoints are only supported by the CADI/Synchronous CADI (SCADI) interfaces of
processor components. They are not supported by memory components like RAMDevice.
When the simulator hits a watchpoint, the CADI/SCADI interface emits a sequence, typically
just one, of modeChange(CADI_EXECMODE_Bpt, bptNumber) callbacks, where bptNumber is the
breakpoint ID of the watchpoint. After this sequence it sends a modeChange(CADI_EXECMODE_Stop)
callback. Only after the debugger receives this Stop callback might it inspect the state of the
model.
Additional information about the last of the hit watchpoints can be read from the following
(non-architectural) core CADI registers in register group Simulation:
memoryBptPC
The PC of the instruction that caused the watchpoint to hit.
memoryBptAccessVA
Virtual address of the access or sub-access that caused the watchpoint to hit.
memoryBptAccessSize
Size in bytes of the access or sub-access that caused the watchpoint to hit.
memoryBptAccessRW
Type of access or sub-access that caused the watchpoint to hit: 1=read, 2=write,
3=both, 0=no access.
These registers are not memory (or CPnn-) mapped anywhere and are not accessible to target
programs. These registers are read-only. All registers are 32-bit.
When multiple accesses have hit watchpoints at the same time, for example during the same
instruction, the information contained in these registers is valid and consistent only for one of
these accesses.
Whenever at least one CADI watchpoint is set on a core, the syncLevel on that core is at least 2.
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