Fast Models Reference Manual - ARM Information Center

Peripheral and Interface Components
• the security mode of the transaction.
The BP141_TZMA fixes the base address of the secure region to the base address of the decode
space. It uses the R0SIZE[9:0] input to configure the size of the secure region in 4KB
increments up to a maximum of 2MB.
Table 5-97 lists the response of the BP141_TZMA for all combinations of address range and
transfer security types. TZMEMSIZE is the maximum addressing range of the memory as defined
by that parameter. See Table 5-99 on page 5-125. By default, TZMEMSIZE is set to 2MB. AxADDR
is the offset address that the transactions want to access.
Table 5-97 BP141_TZMA security control
AxADDR
Memory
Region
Non-secure
Transfer
Secure
Transfer
AxADDR < R0Size secure, R0 illegal legal
R0SIZE TZMEMSIZE no access illegal illegal
Figure 5-53 shows a view of the BP141_TZMA component in System Canvas.
This component is written in LISA+.
Figure 5-53 BP141_TZMA in System Canvas
Ports
Table 5-98 provides a brief description of the BP141_TZMA ports. Further information is
available in separate documentation. See the ARM PrimeCell Infrastructure AMBA 3 AXI
TrustZone Memory Adapter (BP141) Technical Overview.
Name Port protocol Type Description
Table 5-98 BP141_TZMA ports
R0Size Value Slave A software interface that is driven from
the TrustZone Protection Controller
(TZPC), setting the secure region size
by bits [9:0]
pvbus PVBus Slave Slave port for connection to PV bus
master/decoder
pv_output PVBus Master Routed PVBus output
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