Fast Models Reference Manual - ARM Information Center

Peripheral and Interface Components
• connect the slave port to the pvbus_s port on the PVBusSlave.
By default, the PVBusSlave translates all transactions into read() and write() requests on the
device port.
The control port enables you to configure the PVBusSlave for a device. This lets you define the
behavior of the different regions of the address space on the device. You can configure regions
separately for read and write, at a 4k byte granularity. This allows you to set memory-like,
device-like, abort or ignore access address regions.
Transactions to memory-like regions are handled internally by the PVBusSlave subcomponent.
Abort and ignore regions are also handled by the PVBusSlave.
Transactions to device-like regions are forwarded to the device port. Your device must
implement the read() and write() methods on the device port if any regions are configured as
device-like.
Figure 5-5 shows a view of the component in System Canvas.
This component is written in C++.
Figure 5-5 PVBusSlave in System Canvas
Ports
Table 5-5 provides a brief description of the ports in the PVBus component.
Name Port protocol Type Description
Table 5-5 PVBus ports
pvbus_s PVBus Slave Handles incoming requests from bus
masters.
device PVDevice Master Passes on requests for peripheral
register accesses to allow the owning
component to handle the request.
control
PVBusSlave-
Control
Slave
Enables the owning component to
control which regions of the device
memory are to be handled as
RAM/ROM/Device. These settings can
be changed dynamically. For example,
when a Flash component is being
programmed, it can switch to treating
reads as Device requests instead of
ROM requests.
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