Fast Models Reference Manual - ARM Information Center

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Versatile Express Model: Platform and Components 6.5.4 Registers Table 6-12 provides a description of the configuration registers for the VE_SysRegs component. Table 6-12 VE_SysRegs registers Register name Offset Access Description SYS_ID 0x00 read only system identity SYS_SW 0x04 read only bits[7:0] map to switch S6 SYS_LED 0x08 read/write bits[7:0] map to user LEDs SYS_OSC0 0x0C read/write settings for the ICS307 OSC0 SYS_OSC1 0x10 read/write settings for the ICS307 OSC1 SYS_OSC2 0x14 read/write settings for the ICS307 OSC2 SYS_OSC3 0x18 read/write settings for the ICS307 OSC3 SYS_OSC4 0x1C read/write settings for the ICS307 OSC4 SYS_LOCK 0x20 read/write write 0xA05F to unlock SYS_100HZ 0x24 read only 100Hz counter SYS_CONFIGDATA1 0x28 - reserved for configuring clock domain SYS_CONFIGDATA2 0x2C - reserved for configuring clock domain SYS_FLAGS 0x30 read only general purpose flags SYS_FLAGSCLR 0x34 write only clear bits in general purpose flags SYS_NVFLAGS 0x38 read only general purpose non-volatile flags SYS_NVFLAGSCLR 0x3C write only clear bits in general purpose non-volatile flags SYS_PCICTL 0x44 read/write PCI control SYS_MCI 0x48 read only MCI SYS_FLASH 0x4C read/write flash control SYS_CLCD 0x50 read/write controls LCD power and multiplexing SYS_CLCDSER 0x54 read/write LCD control SYS_BOOTCS 0x58 read only boot select switch SYS_24MHZ 0x5C read only 24MHz counter ARM DUI 0423J Copyright © 2008-2011 ARM. All rights reserved. 6-15 ID051811 Non-Confidential
Versatile Express Model: Platform and Components Table 6-12 VE_SysRegs registers (continued) Register name Offset Access Description SYS_MISC 0x60 read only miscellaneous control flags SYS_DMAPSR0 0x64 read/write DMA peripheral map SYS_DMAPSR1 0x68 read/write DMA peripheral map SYS_DMAPSR2 0x6C read/write DMA peripheral map SYS_IOSEL 0x70 read/write peripheral I/O select SYS_PLDCTL1 0x74 read/write configure the attached coretiles SYS_PLDCTL2 0x78 read/write configure the attached coretiles SYS_BUSID 0x80 read only bus ID SYS_PROCID0 0x84 read only processor ID SYS_PROCID1 0x88 read only processor ID SYS_OSCRESET0 0x8C read/write oscillator reset SYS_OSCRESET1 0x90 read/write oscillator reset SYS_OSCRESET2 0x94 read/write oscillator reset SYS_OSCRESET3 0x98 read/write oscillator reset SYS_OSCRESET4 0x9C read/write oscillator reset SYS_VOLTAGE0 0xA0 read/write coretile configuration SYS_VOLTAGE1 0xA4 read/write coretile configuration SYS_VOLTAGE2 0xA8 read/write coretile configuration SYS_VOLTAGE3 0xAC read/write coretile configuration SYS_VOLTAGE4 0xB0 read/write coretile configuration SYS_VOLTAGE5 0xB4 read/write coretile configuration SYS_VOLTAGE6 0xB8 read/write coretile configuration SYS_VOLTAGE7 0xBC read/write coretile configuration SYS_TEST_OSC0 0xC0 read only oscillator test SYS_TEST_OSC1 0xC4 read only oscillator test SYS_TEST_OSC2 0xC8 read only oscillator test SYS_TEST_OSC3 0xCC read only oscillator test SYS_TEST_OSC4 0xD0 read only oscillator test SYS_T1_PLD_DATA 0xE0 read/write PLD configuration SYS_T2_PLD_DATA 0xE4 read/write PLD configuration SYS_GPIO 0xE8 read/write GPIO ARM DUI 0423J Copyright © 2008-2011 ARM. All rights reserved. 6-16 ID051811 Non-Confidential
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Fast Models Version 6.1 Reference M
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Contents Fast Models Reference Manu
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Preface This preface introduces the
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Preface Typographical conventions T
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Preface Feedback ARM welcomes feedb
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Introduction 1.1 About the componen
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Accuracy and Functionality 2.1 Mode
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Accuracy and Functionality 2.2.2 Pe
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Accuracy and Functionality 2. For a
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Accuracy and Functionality Fast Mod
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Signaling and Clocking Protocols 3.
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Signaling and Clocking Protocols 3.
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Signaling and Clocking Protocols Pa
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Signaling and Clocking Protocols Ve
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Chapter 4 Processor Components This
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Processor Components 4.2 ARMCortexA
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Processor Components InstructionCou
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Processor Components c. This is a m
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Processor Components Table 4-4 ARMC
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Processor Components 4.3.9 Library
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Processor Components a. The ase-pre
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Processor Components 4.4.8 Performa
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Processor Components 4.5.3 Paramete
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Processor Components The debugger m
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Processor Components 4.6.1 Ports Ta
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Processor Components Table 4-13 ARM
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Processor Components 4.6.5 Caches T
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Processor Components 4.7.8 Performa
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Processor Components Name Port Prot
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Processor Components b. Currently i
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Processor Components 4.9 ARMCortexR
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Processor Components 4.9.9 Library
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Processor Components Name Port prot
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Processor Components The debugger m
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Processor Components 4.11 ARMCortex
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Processor Components 4.12 ARMv7A -
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Processor Components pwrctli[0-3] V
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Processor Components Table 4-29 Pro
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Processor Components Cache geometry
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Processor Components Note In the vi
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Processor Components Message config
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Processor Components All entries in
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Processor Components 4.13.3 Paramet
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Processor Components Memory The ARM
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Processor Components Memory The ARM
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Processor Components 4.15.5 Debug f
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Processor Components 4.16 ARM926CT
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Processor Components Registers All
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Processor Components • Data/Instr
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Processor Components DMA DMA is cur
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Processor Components Table 4-47 Cor
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Peripheral and Interface Components
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AEM ARMv7-A specifics When paramete
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AEM ARMv7-A specifics When stepping
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AEM ARMv7-A specifics A.2 Debug arc
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AEM ARMv7-A specifics A.3 IMPLEMENT
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Glossary DSR DTR EB GIC GPIO I/O KM
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