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Fast Models Reference Manual - ARM Information Center

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Processor Components<br />

4.5.3 Parameters<br />

Table 4-11 provides a description of the configuration parameters for the <strong>ARM</strong>CortexA8CT<br />

component. Refer to the processor technical reference manual for more details.<br />

Table 4-11 <strong>ARM</strong>CortexA8CT parameters<br />

Parameter Description Type<br />

Allowed<br />

value<br />

Default<br />

value<br />

CFGEND0 Initialize to BE8 endianness. boolean true/false false<br />

CFGNMFI<br />

CFGTE<br />

CP15SDISABLE<br />

Enable non-maskable fast interrupts on<br />

startup.<br />

Initialize to take exceptions in Thumb<br />

state. Model starts in Thumb state.<br />

Initialize to disable access to some CP15<br />

registers.<br />

boolean true/false false<br />

boolean true/false false<br />

boolean true/false false<br />

VINITHI Initialize with high vectors enabled. boolean true/false false<br />

l1_dcache-state_modelled a Include Level 1 data cache state model. boolean true/false false<br />

l1_icache-state_modelled a<br />

l2_cache-state_modelled a<br />

Include Level 1 instruction cache state<br />

model.<br />

Include unified Level 2 cache state<br />

model.<br />

boolean true/false false<br />

boolean true/false false<br />

l1_dcache-size Set L1 D-cache size in bytes. integer 16KB or32KB 0x8000<br />

l1_icache-size Set L1 I-cache size in bytes. integer 16KB or32KB 0x8000<br />

l2_cache-size Set L2 cache size in bytes. integer 128KB -<br />

1024KB<br />

0x40000<br />

device-accurate-tlb Specify whether all TLBs are modeled. boolean true/false false b<br />

implements_vfp<br />

Set whether the model has been built<br />

with VFP and NEON support.<br />

boolean true/false true<br />

semihosting-cmd_line c<br />

Command line available to semihosting<br />

SVC calls.<br />

string<br />

no limit except<br />

memory<br />

[empty<br />

string]<br />

semihosting-debug d<br />

semihosting-enable<br />

Enable debug output of semihosting<br />

SVC calls.<br />

Enable semihosting SVC traps.<br />

Caution<br />

Applications that do not use semihosting<br />

must set this parameter to false.<br />

boolean true/false false<br />

boolean true/false true<br />

semihosting-<strong>ARM</strong>_SVC <strong>ARM</strong> SVC number for semihosting. integer uint24_t 0x123456<br />

semihosting-Thumb_SVC Thumb SVC number for semihosting. integer uint8_t 0xAB<br />

semihosting-heap_base Virtual address of heap base. integer 0x00000000 -<br />

0xFFFFFFFF<br />

semihosting-heap_limit Virtual address of top of heap. integer 0x00000000 -<br />

0xFFFFFFFF<br />

0x0<br />

0x0F000000<br />

<strong>ARM</strong> DUI 0423J Copyright © 2008-2011 <strong>ARM</strong>. All rights reserved. 4-23<br />

ID051811<br />

Non-Confidential

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