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Fast Models Reference Manual - ARM Information Center

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Peripheral and Interface Components<br />

Debug features<br />

The RemapDecoder component has no debug features.<br />

Verification and testing<br />

The RemapDecoder component has been tested as part of the VE example system using VE test<br />

suites and by booting operating systems.<br />

Performance<br />

The RemapDecoder component is not expected to significantly affect the performance of a PV<br />

system.<br />

Library dependencies<br />

The RemapDecoder component has no dependencies on external libraries.<br />

5.4.32 BP135_AXI2APB component<br />

The BP135_AXI2APB component is a programmer’s view model of the <strong>ARM</strong> AXI2APB<br />

Bridge peripheral. The component, when configured by another component such as the<br />

BP141_TZPC, allows control of secure access to up to 16 PrimeCell peripherals. For further<br />

information, refer to the component documentation. See PrimeCell Infrastructure AMBA ® 3<br />

AXI to AMBA 3 APB Bridge (BP135) Revision: r0p0 Technical Overview.<br />

The PVBus makes no distinction between AXI and APB bus protocols. For simple models, you<br />

do not need to use a bridge peripheral when connecting devices to a CPU.<br />

Figure 5-52 shows a view of the component in System Canvas.<br />

This component is written in LISA+.<br />

Figure 5-52 BP135_AXI2APB in System Canvas<br />

<strong>ARM</strong> DUI 0423J Copyright © 2008-2011 <strong>ARM</strong>. All rights reserved. 5-122<br />

ID051811<br />

Non-Confidential

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