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Fast Models Reference Manual - ARM Information Center

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Peripheral and Interface Components<br />

Figure 5-37 PL180_MCI in System Canvas<br />

This component is written in LISA+.<br />

Ports<br />

Table 5-61 provides a brief description of the ports.<br />

Table 5-61 PL180_MCI ports<br />

Name Port protocol Type Description<br />

pvbus PVBus Slave Slave port for connection to PV bus<br />

master/decoder.<br />

MCIINTR[0-1] Signal Master Interrupt request ports.<br />

mmc_m MMC_Protocol Master The Multi Media Card (MMC) master<br />

port.<br />

MMC_Protocol<br />

The PL180_MCI component has one additional protocol.<br />

MMC_Protocol describes an abstract, untimed interface between an MMC controller and an<br />

MMC or SD card. The protocol contains a number of methods that must be implemented by the<br />

master (controller) and some that must be implemented by the slave (card). This protocol is used<br />

by the reference PL180 MCI and MMC models. Further information on the protocol<br />

implementation can be found in the source file. See %PVLIB_HOME%\LISA\MMC_Protocol.lisa.<br />

Use of this protocol assumes some knowledge of the MultiMediaCard specification, available<br />

from the MultiMediaCard Association, www.mmca.org.<br />

MMC_Protocol has the following behaviors:<br />

cmd<br />

Commands are sent from the controller to the card using this behavior, which is<br />

implemented by the card model. The MMC command is sent with an optional<br />

argument. The card responds as defined by the MMC specification. The<br />

controller model checks that the response type matches expectations, and updates<br />

its state appropriately. The transaction-level protocol does not model start/stop<br />

bits or CRCs on the command/response payload.<br />

For data transfer in the card to controller direction, the behaviors are:<br />

Rx After the host and controller have initiated a read through the command interface,<br />

the card calls the Rx behavior on the controller to provide the read data. The call<br />

provides a pointer and a length. The <strong>ARM</strong> MMC reference model simulates<br />

device read latency by waiting a number of clock cycles prior to calling this<br />

behavior. If the controller is unable to accept the data, or wants to force a protocol<br />

error, it can return false in response to this behavior.<br />

Rx_rdy A handshake, used by the controller to inform the card that the controller is ready<br />

to receive more data. The <strong>ARM</strong> MMC reference model does not time out, so waits<br />

indefinitely for this handshake in a multiple block data transfer.<br />

<strong>ARM</strong> DUI 0423J Copyright © 2008-2011 <strong>ARM</strong>. All rights reserved. 5-77<br />

ID051811<br />

Non-Confidential

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