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Fast Models Reference Manual - ARM Information Center

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Peripheral and Interface Components<br />

Parameters<br />

Table 5-56 provides a description of the configuration parameters for the PL110_CLCD<br />

component.<br />

Table 5-56 PL110_CLCD configuration parameters<br />

Parameter name Description Type<br />

Allowed<br />

value<br />

Default<br />

value<br />

pixel_double_limit<br />

Sets a threshold in<br />

horizontal pixels,<br />

below which pixels<br />

sent to the<br />

framebuffer are<br />

doubled in size<br />

horizontally and<br />

vertically.<br />

Integer - 300<br />

Registers<br />

Table 5-57 provides a description of the configuration registers for the PL110_CLCD<br />

component.<br />

Table 5-57 PL110_CLCD registers<br />

Register<br />

name<br />

Offset Access Description<br />

LCDTiming0 0x000 read/write Horizontal timing<br />

LCDTiming1 0x004 read/write Vertical timing<br />

LCDTiming2 0x008 read/write Clock and polarity control<br />

LCDTiming3 0x00C read/write Line end control<br />

LCDUPBASE 0x010 read/write Upper panel frame base<br />

address<br />

LCDLPBASE 0x014 read/write Lower panel frame base<br />

address<br />

LCDIMSC 0x018 read/write Interrupt mask<br />

LCDControl 0x01C read/write Control<br />

LCDRIS 0x020 read only Raw interrupt status<br />

LCDMIS 0x024 read only Masked interrupt status<br />

LCDICR 0x028 write only Interrupt clear<br />

LCDIPCURR 0x02C read only Upper panel current address<br />

LCDLPCURR 0x030 read only Lower panel current address<br />

LCDPalette 0x200 -<br />

0x400<br />

read/write<br />

Palette registers<br />

LCDPeriphID0 0xfe0 read Peripheral ID register<br />

LCDPeriphID1 0xfe4 read Peripheral ID register<br />

<strong>ARM</strong> DUI 0423J Copyright © 2008-2011 <strong>ARM</strong>. All rights reserved. 5-72<br />

ID051811<br />

Non-Confidential

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