Fast Models Reference Manual - ARM Information Center

Peripheral and Interface Components
Table 5-40 PL031_RTC registers (continued)
Register
name
Offset Access Description
RTCPCellID1 0xFF4 read only PrimeCell ID register a .
RTCPCellID2 0xFF8 read only PrimeCell ID register a .
RTCPCellID3 0xFFC read only PrimeCell ID register a .
a. This register has no CADI interface.
Debug features
The PL031_RTC component has no debug features.
Verification and testing
The PL031_RTC component has been tested as part of the VE example system using VE test
suites and by booting operating systems.
The PL031_RTC component has been tested as part of the SMLT component.
Performance
The PL031_RTC component has no impact on the performance of a PV system when idle or
counting down. The component only executes code when the counter expires or during bus
accesses.
Library dependencies
The PL031_RTC component has no dependencies on external libraries.
5.4.8 PL041_AACI component
The PL041_AACI component is programmer's view model of the PL041 Advanced Audio
CODEC Interface (AACI). This component also contains a minimal register model of the
LM4529 secondary codec as implemented on development boards supplied by ARM. Refer to
the component documentation for more details. See the ARM PrimeCell Advanced Audio
CODEC Interface (PL041) Technical Reference Manual.
The PL041_AACI component is not a complete implementation of the AACI because the
following functionality is not currently implemented:
• audio input
• DMA access to FIFOs, rather than Programmed I/O
• programming of the secondary codec through FIFOs rather than slot registers.
The PL041_AACI component is designed to connect to an audio output component such as
AudioOutFile or AudioOut_SDL. See AudioOut_File component on page 5-56. Also see
AudioOut_SDL component on page 5-57.
Figure 5-27 on page 5-54 shows a view of the component in System Canvas.
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