Fast Models Reference Manual - ARM Information Center

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Peripheral and Interface Components Parameters Table 5-99 provides a description of the configuration parameters for the BP141_TZMA component. Table 5-99 BP141_TZMA configuration parameters Parameter name Description Type Allowed value Default value TZMEMSIZE Sets the maximum size of the addressable memory a uint32_t - 0x200000 TZSEGSIZE Configures the size of the region allocated for secure access for each increment of the R0Size value uint32_t multiples of 4096 4096 TZSECROMSIZE Configures the initial region configuration value so that an external secure control is not required uint32_t - 0x200 a. This parameter is deprecated and is provided for backwards compatibility. Registers The BP141_TZMA component has no registers. Debug features The BP141_TZMA component has no debug features. Verification and testing The BP141_TZMA component has been tested separately using its own test suite and as part of the VE example system using VE test suites and by booting operating systems. Performance The BP141_TZMA component is not expected to significantly affect the performance of a PV system. Library dependencies The BP141_TZMA component has no dependencies on external libraries. ARM DUI 0423J Copyright © 2008-2011 ARM. All rights reserved. 5-125 ID051811 Non-Confidential
Peripheral and Interface Components 5.4.34 BP147_TZPC component The BP147_TZPC component is a programmer's view model of the ARM TrustZone Protection Controller (TZPC) peripheral. The TZPC provides a software interface to the protection bits in a secure system in a TrustZone design. For a detailed description of the behavior of the BP147 TZPC, refer to the component documentation. See the PrimeCell Infrastructure AMBA 3 TrustZone Protection Controller (BP147) Revision: r0p0 Technical Overview. Figure 5-54 shows a view of the component in System Canvas. This component is written in LISA+. Figure 5-54 BP147_TZPC in System Canvas Ports Table 5-100 provides a brief description of the BP147_TZPC ports. Refer to the component documentation for more details. Name Port protocol Type Description Table 5-100 BP147_TZPC ports bus_in_s PVBus Slave Slave port for connection to PV bus master/decoder TZPCDECPROT0 Value Master Output decode protection 0 status TZPCDECPROT1 Value Master Output decode protection 1status TZPCDECPROT2 Value Master Output decode protection 2status TZPCR0SIZE Value Master Output secure RAM region size Additional protocols The BP147_TZPC component has no additional protocols. Parameters The BP147_TZPC component has no parameters. ARM DUI 0423J Copyright © 2008-2011 ARM. All rights reserved. 5-126 ID051811 Non-Confidential
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Fast Models Version 6.1 Reference M
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Contents Fast Models Reference Manu
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Preface This preface introduces the
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Preface Typographical conventions T
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Preface Feedback ARM welcomes feedb
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Introduction 1.1 About the componen
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Accuracy and Functionality 2.1 Mode
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Accuracy and Functionality 2.2.2 Pe
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Accuracy and Functionality 2. For a
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Accuracy and Functionality Fast Mod
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Signaling and Clocking Protocols 3.
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Signaling and Clocking Protocols 3.
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Signaling and Clocking Protocols Pa
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Signaling and Clocking Protocols Ve
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Chapter 4 Processor Components This
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Processor Components 4.2 ARMCortexA
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Processor Components InstructionCou
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Processor Components c. This is a m
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Processor Components Table 4-4 ARMC
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Processor Components 4.3.9 Library
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Processor Components a. The ase-pre
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Processor Components 4.4.8 Performa
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Processor Components 4.5.3 Paramete
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Processor Components The debugger m
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Processor Components 4.6.1 Ports Ta
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Processor Components Table 4-13 ARM
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Processor Components 4.9.9 Library
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Processor Components Name Port prot
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Processor Components 4.11 ARMCortex
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Processor Components pwrctli[0-3] V
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Processor Components Table 4-29 Pro
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Processor Components Cache geometry
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Processor Components Note In the vi
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Processor Components Message config
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Processor Components All entries in
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Processor Components 4.13.3 Paramet
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Processor Components Memory The ARM
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Processor Components Memory The ARM
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Processor Components 4.15.5 Debug f
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Processor Components 4.16 ARM926CT
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Processor Components Registers All
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Processor Components • Data/Instr
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Processor Components DMA DMA is cur
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Peripheral and Interface Components
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Chapter 7 Emulation Baseboard Model
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Emulation Baseboard Model: Platform
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AEM ARMv7-A specifics A.1 Boundary
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AEM ARMv7-A specifics When paramete
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AEM ARMv7-A specifics When stepping
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AEM ARMv7-A specifics A.2 Debug arc
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AEM ARMv7-A specifics A.3 IMPLEMENT
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Glossary DSR DTR EB GIC GPIO I/O KM
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