Fast Models Reference Manual - ARM Information Center

Processor Components
4.11 ARMCortexM3CT
Figure 4-10 shows a view of the ARMCortexM3CT component in System Canvas. The
component is based on r2p0 of the Cortex-M3 processor.
This component is written in C++.
Figure 4-10 ARMCortexM3CT in System Canvas
4.11.1 Ports
Table 4-25 provides a brief description of the ports in the ARMCortexM3CT component. Refer
to the processor technical reference manual for more details.
Name Port protocol Type Description
Table 4-25 ARMCortexM3CT ports
auxfault Value slave auxiliary fault status information
bigend Signal slave configure data endianness after a reset
clk_in ClockSignal slave clock input
currpri Value master indicates the current execution priority of the
processor
edbgrq Signal slave external debug request
event Signal peer event input and output for wakeup from WFE.
This port combines the TXEV and
RXEVsignals
intisr[0-239] Signal slave external interrupt signals
intnmi Signal slave non-maskable interrupt
lockup Signal master asserted when processor is in lockup state
poreset Signal slave asynchronous power-on reset signal input
pvbus_m PVBus master master port for all memory accesses except
those on the on the External Private Peripheral
Bus
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