29.11.2014 Views

Fast Models Reference Manual - ARM Information Center

Fast Models Reference Manual - ARM Information Center

Fast Models Reference Manual - ARM Information Center

SHOW MORE
SHOW LESS

Create successful ePaper yourself

Turn your PDF publications into a flip-book with our unique Google optimized e-Paper software.

Peripheral and Interface Components<br />

Debug features<br />

The RAMDevice implements a CADI MEMORY view. You can connect a CADI client to the<br />

target and view the physical memory contents.<br />

Verification and testing<br />

The RAMDevice component has been tested as part of the VE example system using VE test<br />

suites and by booting operating systems.<br />

Performance<br />

The RAMDevice component is not expected to significantly impact the performance of a PV<br />

system.<br />

Library dependencies<br />

The RAMDevice component has no dependencies on external libraries.<br />

5.4.43 SMSC_91C111 component<br />

The SMSC_91C111 component implements a model of the SMSC 91C111 Ethernet controller.<br />

The model provides the register interface of the SMSC part and can be configured to act as an<br />

unconnected Ethernet port, or an Ethernet port connected to the host by an Ethernet bridge.<br />

<strong>Information</strong> on how to install and configure the networking environment is described separately.<br />

See Setting-up a network connection and configuring the networking environment for Microsoft<br />

Windows on page 5-159.<br />

Figure 5-63 shows a view of the component in System Canvas.<br />

This component is written in C++.<br />

Figure 5-63 SMSC_91C111 in System Canvas<br />

Ports<br />

Table 5-118 provides a brief description of the ports in the SMSC_91C111 component.<br />

Name Port protocol Type Description<br />

Table 5-118 SMSC_91C111 ports<br />

pvbus PVBus Slave Slave port for connection to PV bus<br />

master/decoder.<br />

intr Signal Master Interrupt signaling.<br />

clock ClockSignal Slave Clock input, typically 25MHz, which<br />

sets the master transmit/receive rate.<br />

eth VirtualEthernet Master Ethernet port.<br />

<strong>ARM</strong> DUI 0423J Copyright © 2008-2011 <strong>ARM</strong>. All rights reserved. 5-142<br />

ID051811<br />

Non-Confidential

Hooray! Your file is uploaded and ready to be published.

Saved successfully!

Ooh no, something went wrong!