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Fast Models Reference Manual - ARM Information Center

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Accuracy and Functionality<br />

2.2.2 Performance effects of enabling functional caches<br />

In general, enabling functional cache modeling is likely to reduce performance.<br />

The L1 and L2 functional caches can be enabled in any combination, but <strong>ARM</strong> recommends<br />

that functional behavior is either disabled completely or enabled for both I and D L1 caches and<br />

the L2 cache to give consistent system operation.<br />

Enabling functional caches in PL310 L2CC and not enabling functional L1 caches causes model<br />

performance to be significantly reduced.<br />

If platform memory is being modeled outside of the <strong>Fast</strong> <strong>Models</strong> environment, for example in<br />

a SystemC environment, use of functional cache modelling might significantly improve<br />

performance if there is no alternate fast route to memory.<br />

<strong>ARM</strong> DUI 0423J Copyright © 2008-2011 <strong>ARM</strong>. All rights reserved. 2-4<br />

ID051811<br />

Non-Confidential

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