Fast Models Reference Manual - ARM Information Center

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Peripheral and Interface Components • MMC_APP_CMD • MMC_GEN_CMD. I/O mode commands (Class 9) are unsupported: • MMC_FAST_IO • MMC_GO_IRQ_STATE. Reserved commands are not supported. If a reserved command is used, the MMC ST_ER_B_ILLEGAL_COMMAND bit is set. The view of the component is System Canvas is shown in Figure 5-38. This component is written in LISA+. Figure 5-38 MMC in System Canvas Ports Table 5-63 provides a brief description of the ports. Table 5-63 MMC ports Name Port protocol Type Description clk_in ClockSignal Slave Master clock input. mmc MMC_Protocol Slave The MMC slave port. Additional protocols The MMC component uses the MMC_Protocol. See MMC_Protocol on page 5-77. Parameters Table 5-64 provides a description of the configuration parameters for the MMC component. Parameters are provided to allow configuration of a number of attributes reflected in the CID and CSD registers. See Registers on page 5-82. You can customize the component further by modifying the MMC model source code directly. Table 5-64 MMC configuration parameters Parameter name Description Type Allowed value Default value p_mmc_file File used for the MMC component backing store String valid filename mmc.dat p_prodName Card ID product name String six character string ARMmmc p_prodRev Card ID product revision Integer - 0x1 ARM DUI 0423J Copyright © 2008-2011 ARM. All rights reserved. 5-81 ID051811 Non-Confidential
Peripheral and Interface Components Table 5-64 MMC configuration parameters (continued) Parameter name Description Type Allowed value Default value p_manid Card ID manufacturer ID Integer - 0x2 a p_OEMid Card ID OEM ID Integer - 0x0000 p_sernum Card serial number Integer - 0xCA4D0001 a. This is equivalent to “Sandisk”. Registers Table 5-65 provides a description of the configuration registers for the MMC component. For a full definition of MMC registers, refer to the MMCA System Summary documentation. Device-specific register information can also be obtained from MMC vendors. The MMC component registers are not memory mapped. Instead, they are accessed using relevant MMC commands. The MMC component model makes the registers available through a CADI interface. Modification of these registers through CADI is not recommended, but not prohibited. For example, modifying the card ID (CID) registers can be useful when experimenting with drivers, but direct modification of the STATUS_REG register is likely to put the card model into an indeterminate state. Register name Offset Description Table 5-65 MMC registers OCR_REG 0x000 Operating conditions register CID_REG0 0x004 Card ID bits 127:96 CID_REG1 0x005 Card ID bits 95:64 CID_REG2 0x006 Card ID bits 63:32 CID_REG3 0x007 Card ID bits 31:0 CSD_REG0 0x008 Card specific data bits 127:96 CSD_REG1 0x009 Card specific data bits 95:64 CSD_REG2 0x00a Card specific data bits 63:32 CSD_REG3 0x00b Card specific data bit 31:0 RCA_REG 0x00c Relative card address register DSR_REG 0x00d Driver stage register BLOCKLEN_REG 0x00e Block length STATUS_REG 0x00f Card status BLOCK_COUNT_REG 0x010 Block count ARM DUI 0423J Copyright © 2008-2011 ARM. All rights reserved. 5-82 ID051811 Non-Confidential
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Fast Models Version 6.1 Reference M
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Contents Fast Models Reference Manu
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Preface This preface introduces the
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Preface Typographical conventions T
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Preface Feedback ARM welcomes feedb
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Introduction 1.1 About the componen
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Accuracy and Functionality 2.1 Mode
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Accuracy and Functionality 2.2.2 Pe
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Accuracy and Functionality 2. For a
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Accuracy and Functionality Fast Mod
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Signaling and Clocking Protocols 3.
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Signaling and Clocking Protocols 3.
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Signaling and Clocking Protocols Pa
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Signaling and Clocking Protocols Ve
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Chapter 4 Processor Components This
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Processor Components 4.2 ARMCortexA
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Processor Components InstructionCou
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Processor Components c. This is a m
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Processor Components Table 4-4 ARMC
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Processor Components 4.3.9 Library
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Processor Components a. The ase-pre
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Processor Components 4.4.8 Performa
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Processor Components 4.5.3 Paramete
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Processor Components The debugger m
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Processor Components 4.6.1 Ports Ta
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Processor Components Table 4-13 ARM
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Processor Components 4.6.5 Caches T
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Processor Components 4.7.8 Performa
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Processor Components Name Port Prot
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Processor Components b. Currently i
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Processor Components 4.9 ARMCortexR
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Processor Components 4.9.9 Library
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Processor Components Name Port prot
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Processor Components The debugger m
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Processor Components 4.11 ARMCortex
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Processor Components 4.12 ARMv7A -
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Processor Components pwrctli[0-3] V
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Processor Components Table 4-29 Pro
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Processor Components Cache geometry
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Processor Components Note In the vi
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Processor Components Message config
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Processor Components All entries in
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Processor Components 4.13.3 Paramet
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Processor Components Memory The ARM
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Processor Components Memory The ARM
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Processor Components 4.15.5 Debug f
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Processor Components 4.16 ARM926CT
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Processor Components Registers All
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Processor Components • Data/Instr
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Processor Components DMA DMA is cur
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Processor Components Table 4-47 Cor
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Peripheral and Interface Components
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Versatile Express Model: Platform a
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Chapter 7 Emulation Baseboard Model
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Emulation Baseboard Model: Platform
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Microcontroller Prototyping System:
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AEM ARMv7-A specifics A.1 Boundary
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AEM ARMv7-A specifics When paramete
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AEM ARMv7-A specifics When stepping
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AEM ARMv7-A specifics A.2 Debug arc
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AEM ARMv7-A specifics A.3 IMPLEMENT
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AEM ARMv7-A specifics A.4 Trace The
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Glossary DSR DTR EB GIC GPIO I/O KM
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