Fast Models Reference Manual - ARM Information Center

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Peripheral and Interface Components Additional protocols The VFS2 component has no additional protocols. Parameters Table 5-112 provides a description of the configuration parameters for the VFS2 component. Table 5-112 VFS2 configuration parameters Parameter name Description Type Allowed value Default value mount Specifies the path to the host folder that is accessible within the target OS once mounted. String valid path [empty string] Registers The VFS2 component has no registers. Debug features The VFS2 component has no debug features. Verification and testing The VFS2 component has been tested through use with Linux operating systems. Performance The VFS2 component is not expected to significantly affect the performance of a PV system, but is itself dependent on the performance of the host filesystem. Library dependencies The VFS2 component has no dependencies on external libraries. 5.4.41 MessageBox component The MessageBox component is designed to operate as a subcomponent to the VFS2 component. See VFS2 component on page 5-135. When used with a suitable driver, MessageBox allows passing of blocks of data, or messages, between the driver and the parent VFS2 device. The MessageBox component is not a hardware model, and is designed to operate efficiently within a Fast Models platform model. The current MessageBox implementation is generic but is primarily designed to provide a transport layer for the VFS2 component. A C header file, MBoxTypes.h, is supplied in the VFS2/C directory of Fast Models. This header file contains definitions of register offsets, control and status bits, and buffer sizes. The example MessageBox driver implementation in the VFS2/cpptest directory is a simple, polling implementation written in C++. You can request a Linux version from ARM, which is written in C and demonstrates how to use interrupts. For more information, see https://esl-support.arm.com/ ARM DUI 0423J Copyright © 2008-2011 ARM. All rights reserved. 5-137 ID051811 Non-Confidential
Peripheral and Interface Components Figure 5-60 on page 5-136 shows a view of the component in System Canvas. This component is written in LISA+. Figure 5-61 MessageBox component in System Canvas Ports Table 5-113 provides a brief description of the MessageBox component ports. Name Port protocol Type Description Table 5-113 MessageBox ports pvbus_s PVBus Slave Provides memory mapped access to the MessageBox registers and shared buffer. message MessageBox Slave Delivers messages to the parent component, and receives messages from the parent for delivery to the target driver. intr Signal Master Optional interrupt line used to indicate availability of incoming message data. Alternatively the status register can be polled. MessageBox The MessageBox component has one additional protocol. The message port implements half of a protocol for communication with a parent device. The other half is implemented by the parent device. When the CONTROL register is written to with the MBOX_CONTROL_END value, the data between the START and END offsets in the buffer are sent by reference to the parent device. Either during this call, or afterwards, the parent device is free to invoke the other message behaviors to set up an incoming packet and set the RXREADY signal. The protocol behaviors are: begin_msg(void** buffer, uint32_t len) Returns a pointer to the buffer for sending a message. len is ignored. end_msg(uint32_t len) Sets the START/END registers to indicate the start and end of the message in the buffer and sets the RXREADY signal. message(const void* buffer, uint32_t len) Indicates that a message has been received, and the contents are in the buffer with a length of len bytes. This behavior must be implemented by the parent device. cancel_msg() Cancel a message. ARM DUI 0423J Copyright © 2008-2011 ARM. All rights reserved. 5-138 ID051811 Non-Confidential
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Fast Models Version 6.1 Reference M
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Contents Fast Models Reference Manu
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Preface This preface introduces the
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Preface Typographical conventions T
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Preface Feedback ARM welcomes feedb
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Introduction 1.1 About the componen
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Accuracy and Functionality 2.1 Mode
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Accuracy and Functionality 2.2.2 Pe
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Accuracy and Functionality 2. For a
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Accuracy and Functionality Fast Mod
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Signaling and Clocking Protocols 3.
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Signaling and Clocking Protocols 3.
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Signaling and Clocking Protocols Pa
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Signaling and Clocking Protocols Ve
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Chapter 4 Processor Components This
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Processor Components 4.2 ARMCortexA
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Processor Components InstructionCou
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Processor Components c. This is a m
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Processor Components Table 4-4 ARMC
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Processor Components 4.3.9 Library
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Processor Components a. The ase-pre
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Processor Components 4.4.8 Performa
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Processor Components 4.5.3 Paramete
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Processor Components The debugger m
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Processor Components 4.6.1 Ports Ta
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Processor Components Table 4-13 ARM
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Processor Components 4.6.5 Caches T
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Processor Components 4.7.8 Performa
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Processor Components Name Port Prot
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Processor Components b. Currently i
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Processor Components 4.9 ARMCortexR
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Processor Components 4.9.9 Library
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Processor Components Name Port prot
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Processor Components The debugger m
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Processor Components 4.11 ARMCortex
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Processor Components 4.12 ARMv7A -
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Processor Components pwrctli[0-3] V
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Processor Components Table 4-29 Pro
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Processor Components Cache geometry
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Processor Components Note In the vi
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Processor Components Message config
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Processor Components All entries in
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Processor Components 4.13.3 Paramet
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Processor Components Memory The ARM
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Processor Components Memory The ARM
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Processor Components 4.15.5 Debug f
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Processor Components 4.16 ARM926CT
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Processor Components Registers All
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Processor Components • Data/Instr
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Processor Components DMA DMA is cur
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Processor Components Table 4-47 Cor
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Peripheral and Interface Components
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Versatile Express Model: Platform a
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Versatile Express Model: Platform a
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Chapter 7 Emulation Baseboard Model
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Emulation Baseboard Model: Platform
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Microcontroller Prototyping System:
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AEM ARMv7-A specifics A.1 Boundary
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AEM ARMv7-A specifics When paramete
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AEM ARMv7-A specifics When stepping
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AEM ARMv7-A specifics A.2 Debug arc
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AEM ARMv7-A specifics A.3 IMPLEMENT
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Glossary DSR DTR EB GIC GPIO I/O KM
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