Fast Models Reference Manual - ARM Information Center

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Chapter 3 Signaling and Clocking Protocols This chapter describes the common signaling and clocking protocols with Fast Models. It contains the following sections: • About the framework and protocols on page 3-2 • Signaling Protocols on page 3-3 • Clocking components and protocols on page 3-4. ARM DUI 0423J Copyright © 2008-2011 ARM. All rights reserved. 3-1 ID051811 Non-Confidential
Signaling and Clocking Protocols 3.1 About the framework and protocols This section describes the common protocols and components provided by the Fast Models framework. These divide into two groups: • signaling protocols • clocking components and protocols. Programmer's View (PV) models of processors and devices work at a level where functional behavior matches what can be observed from software. Accuracy in timing is sacrificed in order to achieve fast simulation speeds. 3.1.1 Signaling protocols The signaling protocols are very simple protocols used by many components to indicate changes in state for signals such as interrupt and reset. There are two variants of each signaling protocol: • one that allows components to signal a state change to other components • one that allows the other components to passively query the current state of the signal. 3.1.2 Clocking components and protocols The clocking components and protocols provide a mechanism for systems to regulate the execution rate of components within a system. Clocking includes the concept of clock rates, dividers to change clock rates, and timers to generate callbacks based on those clock rates. If the MasterClock component is instantiated in a system, it provides a consistent master clock rate. Although this rate is not defined, you can consider this to be 1Hz. ClockDivider components are able to convert this clock rate into a new rate using a multiplier and divider. You can cascade ClockDivider components to produce many different clock rates within a system. The maximum ratio of any two clocks in the system must be less than 2 32 . ClockTimer components can be instantiated by a component and connected to any MasterClock or ClockDivider output. The ClockTimer can then be used to generate callbacks after a given number of ticks of that clock. The ClockTimer can invoke a behavior on the component to allow the component to perform work. The component can then request the ClockTimer to repeat its count. All clocking components that communicate using an opaque ClockSignal protocol have no behaviors that you can invoke yourself. ARM DUI 0423J Copyright © 2008-2011 ARM. All rights reserved. 3-2 ID051811 Non-Confidential
Page 1 and 2: Fast Models Version 6.1 Reference M
Page 3 and 4: Contents Fast Models Reference Manu
Page 5 and 6: Preface This preface introduces the
Page 7 and 8: Preface Typographical conventions T
Page 9 and 10: Preface Feedback ARM welcomes feedb
Page 11 and 12: Introduction 1.1 About the componen
Page 13 and 14: Accuracy and Functionality 2.1 Mode
Page 15 and 16: Accuracy and Functionality 2.2.2 Pe
Page 17 and 18: Accuracy and Functionality 2. For a
Page 19: Accuracy and Functionality Fast Mod
Page 23 and 24: Signaling and Clocking Protocols 3.
Page 25 and 26: Signaling and Clocking Protocols Pa
Page 27 and 28: Signaling and Clocking Protocols Ve
Page 29 and 30: Chapter 4 Processor Components This
Page 31 and 32: Processor Components 4.2 ARMCortexA
Page 33 and 34: Processor Components InstructionCou
Page 35 and 36: Processor Components c. This is a m
Page 39 and 40: Processor Components Table 4-4 ARMC
Page 43 and 44: Processor Components 4.3.9 Library
Page 47 and 48: Processor Components a. The ase-pre
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Chapter 7 Emulation Baseboard Model
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Fast Models Reference Manual - ARM Information Center

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