Fast Models Reference Manual - ARM Information Center

Processor Components
• Cache geometry configuration on page 4-65
• Debug architecture configuration on page 4-67
• Core configuration on page 4-67
• Semihosting configuration on page 4-68
• Message configuration on page 4-69.
Multicore configuration
You can configure this model as a multicore processor, so there are separate groups of
configuration parameters for each core in the system. In cases where fewer cores than the
maximum number possible are instantiated, the parameters from cpu0 are always used first. See
Table 4-28.
Table 4-28 Multiprocessing parameters
Parameter Description Default
cluster_id
multiprocessor_extensions
num_cores
vmsa.cachetlb_broadcast
cpu[n].SMPnAMP
Value for Cluster ID that is available to target programs in
MPIDR.
Enable the instruction set changes introduced with the
ARMv7 Multiprocessor Extensions.
Number of cores implemented. To instantiate more than one
core, set parameter multiprocessor_extensions.
Enable broadcasting of cache and TLB maintenance
operations that apply to the inner shared domain.
Place this core inside the inner shared domain, and participate
in the coherency protocol that arranges inner cache coherency
among other cores in the domain.
0
true
1
true
false
General processor configuration
This section describes processor configuration parameters. See Table 4-29.
Table 4-29 Processor configuration parameters
Parameter Description Default
auxilliary_feature_register0 Value for AFR0 ID register 0
cpuID Value for main CPU ID register 0x411fc081
dic-spi_count Number of shared peripheral interrupts implemented. 64
dtcm0_base DTCM base address at reset 0
dtcm0_enable Enable DTCM at reset false
dtcm0_size DTCM size in KB 32
FILTEREN
FILTEREND
FILTERSTART
Enable filtering of accesses between master bus ports. This is
usually not used inside a VE system and should be left false.
End of region filtered to pvbus_m1. Values must be aligned to
a 1MB boundary.
Start of region filtered to pvbus_m1. Values must be aligned to
a 1MB boundary.
false
0
0
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