Fast Models Reference Manual - ARM Information Center

Processor Components
4.15 ARM968CT
Figure 4-16 shows a view of the ARM968CT component in System Canvas. This component is
based on r0p1 of the ARM968E-S processor.
This component is written in C++.
Figure 4-16 ARM968CT in System Canvas
4.15.1 Ports
Table 4-42 provides a brief description of the ports of the ARM968CT component. Refer to the
processor technical reference manual for more details.
Name Port protocol Type Description
clk_in ClockSignal slave clock input
Table 4-42 ARM968CT ports
pvbus_m PVBus master master port for all memory accesses
reset Signal slave asynchronous reset signal input
irq Signal slave asynchronous IRQ signal input
fiq Signal slave asynchronous FIQ signal input
ticks InstructionCount master output that can be connected to a visualization
component
vinithi Signal slave initialize with high vectors enabled after a reset
initram Signal slave initialize with ITCM enabled after reset
itcm PVBus slave slave access to ITCM
dtcm PVBus slave slave access to DTCM
bigendinit Signal slave enable BE32 endianness after reset
4.15.2 Additional protocols
The ARM968CT component has no additional protocols.
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