Fast Models Reference Manual - ARM Information Center

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Peripheral and Interface Components Ports Table 5-82 provides a brief description of the ports. Refer to the component documentation for more details. Name Port protocol Type Description Table 5-82 SP804_Timer ports pvbus PVBus Slave Slave port for connection to PV bus master/decoder irq_out0 Signal Master Interrupt signaling irq_out1 Signal Master Interrupt signaling clock ClockSignal Slave Clock input, typically 1MHz, driving master count rate timer_en[0] ClockRateControl Slave Port for changing the rate of timer 1 timer_en[1] ClockRateControl Slave Port for changing the rate of timer 2 Additional protocols The SP804_Timer component has no additional protocols. Parameters The SP804_Timer component has no parameters. Registers Table 5-83 provides a description of the configuration registers for the SP804_Timer component. Table 5-83 SP804_Timer registers Register name Offset Access Description Timer1Load 0x000 read/write Data register Timer1Value 0x004 read only Value register Timer1Control 0x008 read/write Load register Timer1IntClr 0x00C write only Interrupt clear register Timer1RIS 0x010 read only Raw interrupt status register Timer1MIS 0x014 read only Masked interrupt status register Timer1BGLoad 0x018 read/write Background load register Timer2Load 0x020 read/write Data register Timer2Value 0x024 read only Value register Timer2Control 0x028 read/write Load register Timer2IntClr 0x02C write only Interrupt clear register ARM DUI 0423J Copyright © 2008-2011 ARM. All rights reserved. 5-109 ID051811 Non-Confidential
Peripheral and Interface Components Table 5-83 SP804_Timer registers (continued) Register name Offset Access Description Timer2RIS 0x030 read only Raw interrupt status register Timer2MIS 0x034 read only Masked interrupt status register Timer2BGLoad 0x038 read/write Background load register Debug features The SP804_Timer component has no debug features. Verification and testing The SP804_Timer component has been tested as part of the SMLT component. Performance The SP804_Timer component is not expected to significantly affect the performance of a PV system. Library dependencies The SP804_Timer component has no dependencies on external libraries. 5.4.27 SP805_Watchdog component The SP805_Watchdog component is a programmer's view model of the ARM Watchdog timer module. For a detailed description of the behavior of the SP805 timer, refer to the component documentation. See the ARM Watchdog Module (SP805) Technical Reference Manual. Figure 5-47 shows a view of the component in System Canvas. This component is written in LISA+. Figure 5-47 SP805_Watchdog in System Canvas ARM DUI 0423J Copyright © 2008-2011 ARM. All rights reserved. 5-110 ID051811 Non-Confidential
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Fast Models Version 6.1 Reference M
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Contents Fast Models Reference Manu
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Preface This preface introduces the
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Preface Typographical conventions T
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Preface Feedback ARM welcomes feedb
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Introduction 1.1 About the componen
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Accuracy and Functionality 2.1 Mode
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Accuracy and Functionality 2.2.2 Pe
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Accuracy and Functionality 2. For a
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Accuracy and Functionality Fast Mod
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Signaling and Clocking Protocols 3.
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Signaling and Clocking Protocols 3.
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Signaling and Clocking Protocols Pa
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Signaling and Clocking Protocols Ve
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Chapter 4 Processor Components This
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Processor Components 4.2 ARMCortexA
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Processor Components InstructionCou
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Processor Components c. This is a m
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Processor Components Table 4-4 ARMC
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Processor Components 4.3.9 Library
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Processor Components a. The ase-pre
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Processor Components 4.4.8 Performa
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Processor Components 4.5.3 Paramete
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Processor Components The debugger m
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Processor Components 4.6.1 Ports Ta
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Processor Components Table 4-13 ARM
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Processor Components 4.6.5 Caches T
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Processor Components 4.7.8 Performa
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Processor Components Name Port Prot
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Processor Components b. Currently i
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Processor Components 4.9 ARMCortexR
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Processor Components 4.9.9 Library
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Processor Components Name Port prot
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Processor Components The debugger m
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Processor Components 4.11 ARMCortex
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Processor Components 4.12 ARMv7A -
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Processor Components pwrctli[0-3] V
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Processor Components Table 4-29 Pro
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Processor Components Cache geometry
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Processor Components Note In the vi
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Processor Components Message config
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Processor Components All entries in
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Processor Components 4.13.3 Paramet
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Processor Components Memory The ARM
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Processor Components Memory The ARM
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Processor Components 4.15.5 Debug f
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Processor Components 4.16 ARM926CT
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Processor Components Registers All
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Processor Components • Data/Instr
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Processor Components DMA DMA is cur
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Processor Components Table 4-47 Cor
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Peripheral and Interface Components
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Versatile Express Model: Platform a
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Chapter 7 Emulation Baseboard Model
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Emulation Baseboard Model: Platform
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Microcontroller Prototyping System:
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AEM ARMv7-A specifics A.1 Boundary
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AEM ARMv7-A specifics When paramete
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AEM ARMv7-A specifics When stepping
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AEM ARMv7-A specifics A.2 Debug arc
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AEM ARMv7-A specifics A.3 IMPLEMENT
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AEM ARMv7-A specifics A.4 Trace The
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Glossary DSR DTR EB GIC GPIO I/O KM
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