Fast Models Reference Manual - ARM Information Center

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Peripheral and Interface Components Table 5-40 PL031_RTC registers (continued) Register name Offset Access Description RTCPCellID1 0xFF4 read only PrimeCell ID register a . RTCPCellID2 0xFF8 read only PrimeCell ID register a . RTCPCellID3 0xFFC read only PrimeCell ID register a . a. This register has no CADI interface. Debug features The PL031_RTC component has no debug features. Verification and testing The PL031_RTC component has been tested as part of the VE example system using VE test suites and by booting operating systems. The PL031_RTC component has been tested as part of the SMLT component. Performance The PL031_RTC component has no impact on the performance of a PV system when idle or counting down. The component only executes code when the counter expires or during bus accesses. Library dependencies The PL031_RTC component has no dependencies on external libraries. 5.4.8 PL041_AACI component The PL041_AACI component is programmer's view model of the PL041 Advanced Audio CODEC Interface (AACI). This component also contains a minimal register model of the LM4529 secondary codec as implemented on development boards supplied by ARM. Refer to the component documentation for more details. See the ARM PrimeCell Advanced Audio CODEC Interface (PL041) Technical Reference Manual. The PL041_AACI component is not a complete implementation of the AACI because the following functionality is not currently implemented: • audio input • DMA access to FIFOs, rather than Programmed I/O • programming of the secondary codec through FIFOs rather than slot registers. The PL041_AACI component is designed to connect to an audio output component such as AudioOutFile or AudioOut_SDL. See AudioOut_File component on page 5-56. Also see AudioOut_SDL component on page 5-57. Figure 5-27 on page 5-54 shows a view of the component in System Canvas. ARM DUI 0423J Copyright © 2008-2011 ARM. All rights reserved. 5-53 ID051811 Non-Confidential
Peripheral and Interface Components Figure 5-27 PL041_AACI in System Canvas This component is written in LISA+. Ports The table below provides a brief description of the ports on the PL041_AACI component. Refer to the component documentation for more details. Name Port protocol Type Description Table 5-41 PL041_AACI ports clk_ref_in ClockSignal Slave Reference clock input, typically 25MHz. pvbus PVBus Slave Slave port for connection to PV bus master/decoder. audio AudioControl Master Used to communicate with an audio out device. irq Signal Master Single IRQ output port. AudioControl protocol The PL041_AACI component has one additional protocol. The AudioControl protocol has the following behaviors: getPVAudioBuffer get an underlying host buffer for audio output releasePVAudioBuffer release an underlying host buffer. Parameters The PL041_AACI component has no parameters. ARM DUI 0423J Copyright © 2008-2011 ARM. All rights reserved. 5-54 ID051811 Non-Confidential
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Fast Models Version 6.1 Reference M
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Contents Fast Models Reference Manu
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Preface This preface introduces the
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Preface Typographical conventions T
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Preface Feedback ARM welcomes feedb
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Introduction 1.1 About the componen
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Accuracy and Functionality 2.1 Mode
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Accuracy and Functionality 2.2.2 Pe
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Accuracy and Functionality 2. For a
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Accuracy and Functionality Fast Mod
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Signaling and Clocking Protocols 3.
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Signaling and Clocking Protocols 3.
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Signaling and Clocking Protocols Pa
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Signaling and Clocking Protocols Ve
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Chapter 4 Processor Components This
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Processor Components 4.2 ARMCortexA
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Processor Components InstructionCou
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Processor Components c. This is a m
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Processor Components Table 4-4 ARMC
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Processor Components 4.3.9 Library
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Processor Components a. The ase-pre
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Processor Components 4.4.8 Performa
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Processor Components 4.5.3 Paramete
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Processor Components The debugger m
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Processor Components 4.6.1 Ports Ta
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Processor Components Table 4-13 ARM
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Processor Components 4.6.5 Caches T
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Processor Components 4.7.8 Performa
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Processor Components Name Port Prot
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Processor Components b. Currently i
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Processor Components 4.9 ARMCortexR
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Processor Components 4.9.9 Library
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Processor Components Name Port prot
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Processor Components The debugger m
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Processor Components 4.11 ARMCortex
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Processor Components 4.12 ARMv7A -
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Processor Components pwrctli[0-3] V
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Processor Components Table 4-29 Pro
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Processor Components Cache geometry
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Processor Components Note In the vi
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Processor Components Message config
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Processor Components All entries in
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Processor Components 4.13.3 Paramet
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Processor Components Memory The ARM
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Processor Components Memory The ARM
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Processor Components 4.15.5 Debug f
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Processor Components 4.16 ARM926CT
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Processor Components Registers All
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Processor Components • Data/Instr
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Processor Components DMA DMA is cur
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Processor Components Table 4-47 Cor
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Chapter 7 Emulation Baseboard Model
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Emulation Baseboard Model: Platform
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Microcontroller Prototyping System:
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AEM ARMv7-A specifics A.1 Boundary
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AEM ARMv7-A specifics When stepping
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AEM ARMv7-A specifics A.2 Debug arc
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AEM ARMv7-A specifics A.3 IMPLEMENT
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AEM ARMv7-A specifics A.4 Trace The
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Glossary DSR DTR EB GIC GPIO I/O KM
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