Fast Models Reference Manual - ARM Information Center

Peripheral and Interface Components
Figure 5-45 PL390_GIC in System Canvas
This component is written in LISA and C++.
Ports
Table 5-79 provides a brief description of the PL390_GIC component ports. Refer to the
component documentation for more details.
Name Port protocol Type Description
Table 5-79 PL390_GIC ports
nfiq [8] Signal Master Send out FIQ signal to CPU
nirq [8] Signal Master Send out IRQ signal to CPU
ppi_c0 [16] Signal Slave Private peripheral interrupt for CPU0
(num_cpus>=1)
ppi_c1 [16] Signal Slave Private peripheral interrupt for CPU1
(num_cpus>=2)
ppi_c2 [16] Signal Slave Private peripheral interrupt for CPU2
(num_cpus>=3)
ppi_c3 [16] Signal Slave Private peripheral interrupt for CPU3
(num_cpus>=4)
ppi_c4 [16] Signal Slave Private peripheral interrupt for CPU4
(num_cpus>=5)
ppi_c5 [16] Signal Slave Private peripheral interrupt for CPU5
(num_cpus>=6)
ppi_c6 [16] Signal Slave Private peripheral interrupt for CPU6
(num_cpus>=7)
ppi_c7 [16] Signal Slave Private peripheral interrupt for CPU7
(num_cpus>=8)
pvbus_cpu PVBus Slave Slave port for connection to CPU
interface
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