Fast Models Reference Manual - ARM Information Center

More documents

Recommendations

Info

Peripheral and Interface Components 5.4.1 About the Example Peripheral Components Model Library The Example Peripheral Components Model Library is a component of Fast Models. Generic peripheral components as implemented in Fast Models are described in this section. Ports, functionality, parameters and registers for the model components are provided. These example peripheral components are provided to demonstrate how to model different types of components, and to provide a set of examples that allows the development of example platforms. They may not model all aspects of a component, and they may be only partially validated. For details of the functionality of the hardware that the model simulates, refer to the relevant technical reference manual. 5.4.2 PL011_Uart component The PL011_Uart component provides a programmer's view model of the PL011_UART PrimeCell component as described in its technical reference manual. See PrimeCell UART (PL011) r1p4 Technical Reference Manual. Note The PL011_Uart component does not implement the DMA functionality of the PL011 PrimeCell. Figure 5-21 shows a view of the component in System Canvas. This component is written in LISA+. Figure 5-21 PL011_Uart in System Canvas Ports Table 5-25 provides a brief description of the PL011_Uart component ports. See the PL011 technical reference manual for more details. Name Port protocol Type Description Table 5-25 PL011_Uart ports pvbus PVBus Slave Slave port for connection to PV bus master/decoder. intr Signal Master Interrupt signaling. clk_in_ref ClockSignal Slave Clock input, typically 14.745MHz, which sets the master transmit/receive rate. serial_out SerialData Master Used to communicate with a serial device, such as a terminal. ARM DUI 0423J Copyright © 2008-2011 ARM. All rights reserved. 5-41 ID051811 Non-Confidential
Peripheral and Interface Components SerialData protocol for PL011_Uart The PL011_Uart component has one additional protocol, SerialData. The serial data protocol is implemented as a parallel interface for efficiency. All communication is driven by the master port. dataTransmit(uint16_t data) : void Used by the master to send data to the slave. See Table 5-26 for bit definitions. Table 5-26 Bits for dataTransmit() Bits Function 15:8 reserved 7:0 transmit data dataReceive(void) : uint16_t Used by the master to receive data from the slave. See Table 5-27 for bit definitions. Table 5-27 Bits for dataReceive() Bits Function 15:13 reserved 12 set when no data available for reading 11 reserved 10 break error 9:8 reserved 7:0 receive data signalsSet(uint8_t signal) : void Used by the master to get the current signal status. See Table 5-28 for bit definitions. Table 5-28 Bits for signalsSet() Bits Function 7 Out1 6 Out2 5 RTS 4 DTR 3:0 reserved ARM DUI 0423J Copyright © 2008-2011 ARM. All rights reserved. 5-42 ID051811 Non-Confidential
Page 1 and 2:
Fast Models Version 6.1 Reference M
Page 3 and 4:
Contents Fast Models Reference Manu
Page 5 and 6:
Preface This preface introduces the
Page 7 and 8:
Preface Typographical conventions T
Page 9 and 10:
Preface Feedback ARM welcomes feedb
Page 11 and 12:
Introduction 1.1 About the componen
Page 13 and 14:
Accuracy and Functionality 2.1 Mode
Page 15 and 16:
Accuracy and Functionality 2.2.2 Pe
Page 17 and 18:
Accuracy and Functionality 2. For a
Page 19 and 20:
Accuracy and Functionality Fast Mod
Page 21 and 22:
Signaling and Clocking Protocols 3.
Page 23 and 24:
Signaling and Clocking Protocols 3.
Page 25 and 26:
Signaling and Clocking Protocols Pa
Page 27 and 28:
Signaling and Clocking Protocols Ve
Page 29 and 30:
Chapter 4 Processor Components This
Page 31 and 32:
Processor Components 4.2 ARMCortexA
Page 33 and 34:
Processor Components InstructionCou
Page 35 and 36:
Processor Components c. This is a m
Page 37 and 38:
Page 39 and 40:
Processor Components Table 4-4 ARMC
Page 41 and 42:
Page 43 and 44:
Processor Components 4.3.9 Library
Page 45 and 46:
Page 47 and 48:
Processor Components a. The ase-pre
Page 49 and 50:
Processor Components 4.4.8 Performa
Page 51 and 52:
Processor Components 4.5.3 Paramete
Page 53 and 54:
Processor Components The debugger m
Page 55 and 56:
Processor Components 4.6.1 Ports Ta
Page 57 and 58:
Processor Components Table 4-13 ARM
Page 59 and 60:
Processor Components 4.6.5 Caches T
Page 61 and 62:
Page 63 and 64:
Page 65 and 66:
Processor Components 4.7.8 Performa
Page 67 and 68:
Processor Components Name Port Prot
Page 69 and 70:
Page 71 and 72:
Processor Components b. Currently i
Page 73 and 74:
Processor Components 4.9 ARMCortexR
Page 75 and 76:
Page 77 and 78:
Processor Components 4.9.9 Library
Page 79 and 80:
Processor Components Name Port prot
Page 81 and 82:
Processor Components The debugger m
Page 83 and 84:
Processor Components 4.11 ARMCortex
Page 85 and 86:
Page 87 and 88:
Processor Components 4.12 ARMv7A -
Page 89 and 90:
Processor Components pwrctli[0-3] V
Page 91 and 92:
Processor Components Table 4-29 Pro
Page 93 and 94:
Processor Components Cache geometry
Page 95 and 96:
Processor Components Note In the vi
Page 97 and 98:
Processor Components Message config
Page 99 and 100:
Processor Components All entries in
Page 101 and 102:
Processor Components 4.13.3 Paramet
Page 103 and 104:
Processor Components Memory The ARM
Page 105 and 106:
Page 107 and 108:
Processor Components Memory The ARM
Page 109 and 110:
Page 111 and 112: Processor Components 4.15.5 Debug f
Page 113 and 114: Processor Components 4.16 ARM926CT
Page 115 and 116: Processor Components Registers All
Page 117 and 118: Processor Components • Data/Instr
Page 119 and 120: Processor Components DMA DMA is cur
Page 121 and 122: Processor Components Table 4-47 Cor
Page 123 and 124: Peripheral and Interface Components
Page 161: Peripheral and Interface Components
Page 213 and 214:
Peripheral and Interface Components
Page 215 and 216:
Page 217 and 218:
Page 219 and 220:
Page 221 and 222:
Page 223 and 224:
Page 225 and 226:
Page 227 and 228:
Page 229 and 230:
Page 231 and 232:
Page 233 and 234:
Page 235 and 236:
Page 237 and 238:
Page 239 and 240:
Page 241 and 242:
Page 243 and 244:
Page 245 and 246:
Page 247 and 248:
Page 249 and 250:
Page 251 and 252:
Page 253 and 254:
Page 255 and 256:
Page 257 and 258:
Page 259 and 260:
Page 261 and 262:
Page 263 and 264:
Page 265 and 266:
Page 267 and 268:
Page 269 and 270:
Page 271 and 272:
Page 273 and 274:
Page 275 and 276:
Page 277 and 278:
Page 279 and 280:
Page 281 and 282:
Page 283 and 284:
Page 285 and 286:
Page 287 and 288:
Page 289 and 290:
Page 291 and 292:
Page 293 and 294:
Versatile Express Model: Platform a
Page 295 and 296:
Page 297 and 298:
Page 299 and 300:
Page 301 and 302:
Page 303 and 304:
Page 305 and 306:
Page 307 and 308:
Page 309 and 310:
Page 311 and 312:
Page 313 and 314:
Chapter 7 Emulation Baseboard Model
Page 315 and 316:
Emulation Baseboard Model: Platform
Page 317 and 318:
Page 319 and 320:
Page 321 and 322:
Page 323 and 324:
Page 325 and 326:
Page 327 and 328:
Page 329 and 330:
Page 331 and 332:
Page 333 and 334:
Page 335 and 336:
Page 337 and 338:
Page 339 and 340:
Microcontroller Prototyping System:
Page 341 and 342:
Page 343 and 344:
Page 345 and 346:
Page 347 and 348:
Page 349 and 350:
Page 351 and 352:
Page 353 and 354:
Page 355 and 356:
AEM ARMv7-A specifics A.1 Boundary
Page 357 and 358:
AEM ARMv7-A specifics When paramete
Page 359 and 360:
AEM ARMv7-A specifics When stepping
Page 361 and 362:
AEM ARMv7-A specifics A.2 Debug arc
Page 363 and 364:
AEM ARMv7-A specifics A.3 IMPLEMENT
Page 365 and 366:
AEM ARMv7-A specifics A.4 Trace The
Page 367 and 368:
Glossary DSR DTR EB GIC GPIO I/O KM
show all

Fast Models Reference Manual - ARM Information Center

You also want an ePaper? Increase the reach of your titles

Delete template?

Save as template?