Fast Models Reference Manual - ARM Information Center

Peripheral and Interface Components
Table 5-57 PL110_CLCD registers (continued)
Register
name
Offset Access Description
LCDPeriphID2 0xfe8 read Peripheral ID register
LCDPeriphID3 0xfec read Peripheral ID register
LCDPCellID0 0xff0 read PrimeCell ID register
LCDPCellID1 0xff4 read PrimeCell ID register
LCDPCellID2 0xff8 read PrimeCell ID register
LCDPCellID3 0xffc read PrimeCell ID register
Debug features
The PL110_CLCD component has no debug features.
Verification and testing
The PL110_CLCD component has been tested as part of the VE example system using VE test
suites and by booting operating systems.
Performance
The PL110_CLCD component might affect the performance of a PV system. The
implementation is optimized for situations where the majority of the framebuffer does not
change. For instance, displaying full screen video results in significantly reduced performance.
Rendering pixel data into an appropriate form for the framebuffer port (rasterization) can also
take a significant amount of simulation time. If the pixel data are coming from a PVBusSlave
region that has been configured as memory-like, rasterization only occurs in regions where
memory contents are modified.
Library dependencies
The PL110_CLCD component has no dependencies on external libraries.
5.4.17 PL111_CLCD component
The PL111_CLCD component provides all features of the programmer's view model of the
PL110 CLCD. The new hardware cursor feature of the PL111_CLCD is implemented as the
major change compared with PL110.
The view of the component is System Canvas is shown in Figure 5-36.
This component is written in LISA.
Figure 5-36 PL111_CLCD in System Canvas
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