Fast Models Reference Manual - ARM Information Center

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Versatile Express Model: Platform and Components Note The VE RTSM implementation of memory does not require programming the memory controller with the correct values. This means you must ensure that the memory controller is set up properly if you run an application on actual hardware. If this is not done, applications that run on a RTSM might fail on actual hardware. ARM DUI 0423J Copyright © 2008-2011 ARM. All rights reserved. 6-5 ID051811 Non-Confidential
Versatile Express Model: Platform and Components 6.3 VE model parameters Table 6-4 lists the VE RTSM instantiation time parameters that you can change when you start the model. The syntax to use in a configuration file is: baseboard.component_name.parameter=value Table 6-4 VE model instantiation parameters Component name Parameter Description Type Values Default eb_sysregs_0 user_switches_value switch S6 setting integer see Switch S6 0 eb_sysregs_0 boot_switch_value switch S8 setting integer see Switch S8 on page 6-7 flashldr_1 fname path to flash image file string valid filename mmc p_mmc_file multimedia card filename string valid filename 0 "" mmc.dat pl111_clcd_0 pixel_double_limit sets threshold in horizontal pixels below which pixels sent to framebuffer doubled in size in both dimensions smc REMAP indicates which channel of the SMC is bootable sp810_sysctrl use_s8 indicates whether to read boot_switches_value integer - 0x12c integer -1, 0-7 -1 (no remap) boolean true or false false vfs2 mount mount point for the host file system string directory path on host "" sdram_size sdram_size size of memory logic tile in second installed coretile integer 0x00000000 to 0x10000000 (1GB) 0 (0GB) 6.3.1 Switch S6 Switch S6 is equivalent to the Boot Monitor configuration switch on the VE hardware. Default settings are listed in Table 6-5 on page 6-7. If you have the standard ARM Boot Monitor flash image loaded, the setting of switch S6-1 changes what happens on model reset. Otherwise, the function of switch S6 is implementation dependent. ARM DUI 0423J Copyright © 2008-2011 ARM. All rights reserved. 6-6 ID051811 Non-Confidential
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Fast Models Version 6.1 Reference M
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Contents Fast Models Reference Manu
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Preface This preface introduces the
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Preface Typographical conventions T
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Preface Feedback ARM welcomes feedb
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Introduction 1.1 About the componen
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Accuracy and Functionality 2.1 Mode
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Accuracy and Functionality 2.2.2 Pe
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Accuracy and Functionality 2. For a
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Accuracy and Functionality Fast Mod
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Signaling and Clocking Protocols 3.
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Signaling and Clocking Protocols 3.
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Signaling and Clocking Protocols Pa
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Signaling and Clocking Protocols Ve
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Chapter 4 Processor Components This
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Processor Components 4.2 ARMCortexA
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Processor Components InstructionCou
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Processor Components c. This is a m
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Processor Components Table 4-4 ARMC
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Processor Components 4.3.9 Library
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Processor Components a. The ase-pre
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Processor Components 4.4.8 Performa
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Processor Components 4.5.3 Paramete
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Processor Components The debugger m
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Processor Components 4.6.1 Ports Ta
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Processor Components Table 4-13 ARM
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Processor Components 4.6.5 Caches T
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Processor Components 4.7.8 Performa
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Processor Components Name Port Prot
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Processor Components b. Currently i
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Processor Components 4.9 ARMCortexR
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Processor Components 4.9.9 Library
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Processor Components Name Port prot
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Processor Components The debugger m
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Processor Components 4.11 ARMCortex
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Processor Components 4.12 ARMv7A -
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Processor Components pwrctli[0-3] V
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Processor Components Table 4-29 Pro
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Processor Components Cache geometry
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Processor Components Note In the vi
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Processor Components Message config
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Processor Components All entries in
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Processor Components 4.13.3 Paramet
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Processor Components Memory The ARM
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Processor Components Memory The ARM
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Processor Components 4.15.5 Debug f
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Processor Components 4.16 ARM926CT
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Processor Components Registers All
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Processor Components • Data/Instr
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Processor Components DMA DMA is cur
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Processor Components Table 4-47 Cor
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Peripheral and Interface Components
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Page 245 and 246: Peripheral and Interface Components
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Microcontroller Prototyping System:
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AEM ARMv7-A specifics A.1 Boundary
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AEM ARMv7-A specifics When paramete
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AEM ARMv7-A specifics When stepping
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AEM ARMv7-A specifics A.2 Debug arc
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AEM ARMv7-A specifics A.3 IMPLEMENT
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AEM ARMv7-A specifics A.4 Trace The
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Glossary DSR DTR EB GIC GPIO I/O KM
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Fast Models Reference Manual - ARM Information Center

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