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Verifikation reaktiver Systeme - Universität Kaiserslautern

Verifikation reaktiver Systeme - Universität Kaiserslautern

Verifikation reaktiver Systeme - Universität Kaiserslautern

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many classical mathematical theorems and therefore require a certain body of<br />

mathematical concepts. Thus, there is a need for semi-automated theorem proving<br />

systems that allows the statement and verification of correctness properties<br />

at higher levels of abstraction.<br />

Theorem proving has shown to be a powerful method in this area. But it<br />

is not the magic bullet: Users must spend a lot of time to guide the prove<br />

process. Automation of this work is still a complex task with a lot of work to<br />

be done. Even reasoning about finite state machine logic is tedious in a theorem<br />

proving environments, since theorem provers are not good at reasoning about<br />

large amounts of random logic.<br />

To combine the advantages of the various formal methods, various research<br />

groups (both at universities and in industry) work on a tight integration between<br />

semi-automated theorem proving and other property verification tools.<br />

This approach seems to be the most promising to push back the boundaries on<br />

the today’s application of formal methods. Hardware verification is the largest<br />

industrial application of automated theorem proving: AMD, IBM, and Intel are<br />

among the companies that employ automated theorem proving technology for<br />

verification.<br />

The rest of this article is organised as follows: Section 2 introduces the HOL<br />

system and its foundations. In section 3, three examples are presented: The first<br />

one is a simple parity checker demonstrates basic techniques to verify hardware<br />

components with a theorem proover. The second one shows the proof of a basic<br />

arithmetic algorithm used in hardware designs, the binary greatest common<br />

divisor algorithm. The last example illustrates the definition of new types, a<br />

basic concept of extending and building new theories. In Section 4 finally, some<br />

conclusions are drawn.<br />

2 The HOL System<br />

2.1 Overview<br />

HOL4 is the lastest version of the HOL automated proof system for higher order<br />

logic. It provides an environment with an expressive notation for writing system<br />

specifications and powerful facilities for creating formal proofs of properties of<br />

specifications. It features built-in decision procedures that automate some lowlevel<br />

details of proofs. But one of its most important properties is its rigorous<br />

and well-understood theoretical basis that allows users to extend the system<br />

without compromising security (due to Robin Milner’s LCF approach). The HOL<br />

system is built on top of Moscow ML, a light-weight implementation of the strict<br />

functional language of Standard ML (SML). It has been used in many areas,<br />

including the definition of HDL semantics (e.g. VHDL, Verilog), hardware design<br />

and verification, reasoning about security, reasoning about real-time systems and<br />

software verification.<br />

The HOL system comes with an extensive library containing hundreds of predefined<br />

types, functions, tactics and proved theorems. For verifying arithmetic

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