Cortex-A8 Technical Reference Manual - ARM Information Center

3.2.27 c1, Coprocessor Access Control Register
System Control Coprocessor
The purpose of the Coprocessor Access Control Register is to set access rights for the
coprocessors CP0 through CP13. This register has no effect on access to CP14, the debug
control coprocessor, or CP15, the system control coprocessor. This register also provides a
means for software to determine if any particular coprocessor, CP0-CP13, exists in the system.
The Coprocessor Access Control Register is:
• a read/write register common to Secure and Nonsecure states
• accessible in privileged modes only.
Figure 3-22 shows the bit arrangement of the Coprocessor Access Control Register.
Reserved
Figure 3-22 Coprocessor Access Control Register format
Table 3-51 shows how the bit values correspond with the Coprocessor Access Control Register
functions.
Bits Field Function
31 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
[31:28] - Reserved. UNP, SBZP.
cp13 cp12 cp11 cp10 cp9 cp8 cp7 cp6 cp5 cp4 cp3 cp2 cp1 cp0
Table 3-51 Coprocessor Access Control Register bit functions
- cp a Defines access permissions for each coprocessor. Access denied is the reset condition and is the
behavior for nonexistent coprocessors:
b00 = Access denied, reset value. Attempted access generates an Undefined Instruction exception.
b01 = Privileged mode access only.
b10 = Reserved.
b11 = Privileged and User mode access.
a. n is the coprocessor number between 0 and 13.
Nonsecure
Access Control
Register bit
Access to coprocessors in the Nonsecure state depends on the permissions set in the c1,
Nonsecure Access Control Register on page 3-56.
Attempts to read or write the Coprocessor Access Control Register access bits depend on the
corresponding bit for each coprocessor in c1, Nonsecure Access Control Register on page 3-56.
Table 3-52 shows the results of attempted access to coprocessor access bits for each mode.
Table 3-52 Results of access to the Coprocessor Access Control Register a
Secure privileged Nonsecure privileged Secure User Nonsecure User
Read Write Read Write Read Write Read Write
0 Data Data b00 Ignored
1 Data Data Data Data
Undefined Undefined
a. An entry of Undefined in the table means that the access gives an Undefined Instruction exception when the
coprocessor instruction is executed.
To access the Coprocessor Access Control Register, read or write CP15 with:
MRC p15, 0, , c1, c0, 2 ; Read Coprocessor Access Control Register
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