Cortex-A8 Technical Reference Manual - ARM Information Center

MOV r0, r4
POP {r4, pc}
Example 12-31 shows the sequence on power up of an operating system.
Debug
Example 12-31 OS debug register restore sequence
; On entry, r0 points to a block of saved debug registers.
RestoreDebugRegisters
PUSH {r4, lr}
MOV r4, r0 ; save pointer
; Step 1. Get the number of words saved.
BL GetDebugRegisterBase ; returns base in R0
LDR r1, [r0, 0x308] ; OSSRR returns size on first read
; Step 2. Loop writing words from the OSSRR.
1 LDR r2, [r4], 4 ; load a word from the save stack
STR r2, [r0, 0x308] ; store a word of data
SUBS r1, r1, 1
BNE%B1 ; loop
; Step 3. Clear the OS Lock Access Register (OSLAR).
LDR r1, =0xC5ACCE55
STR r1, [r0, 0x300] ; write OSLAR
; Step 4. Return the pointer to the first word not written.
MOV r0, r4
POP {r4, pc}
Note
When the OSLAR is cleared, a debug event is triggered if the OS unlock catch bit is set to 1.
This can be useful for a debugger to restart a debugging session.
12.12.5 Registers available during power down
12.12.6 Scenarios and usage models
Some debug registers reside in the debug power domain so they can be available while the core
is powered down. This register set is chosen so the debugger can identify the part at any time
and debug the OS power-up sequence.
This section describes the different debugging scenarios for systems with energy management
capabilities along with a description of how the debug features help with those.
Application debug on a stable OS
For this system, set the DBGNOPWRDWN signal to 1 to emulate power down.
Application debug on an OS with save and restore capability
For this system, application debug is possible without power-down emulation if
the OS supports storing and recovering of the debug registers. This is useful in
systems where either:
• the save and restore capability is already implemented in the OS
• power-down emulation is undesirable because it makes it difficult to
reproduce the error
• the system design does not support the power-down emulation.
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