Cortex-A8 Technical Reference Manual - ARM Information Center

System Control Coprocessor
31 7 6 1 0
Reserved
FSR[12,10,3:0] 1
Figure 3-35 PA Register format for unsuccessful translation
Table 3-78 shows how the bit values correspond with the PAR for a successful translation.
Table 3-78 PA Register for successful translation bit functions
Bits Field Function
[31:12] PA Contains the physical address after a successful translation.
[11:10] - Reserved. UNP, SBZ.
[9] NS Indicates the state of the NS attribute bit in the translation
table:
0 = secure memory
1 = nonsecure memory.
[8] P Not used in the processor.
[7] SH Indicates shareable memory:
0 = nonshared
1 = shared.
[6:4] INNER Indicates the inner attributes from the translation table:
b000 = noncacheable
b001 = strongly ordered
b010 = reserved
b011 = device
b100 = reserved
b101 = inner write-back, allocate on write
b110 = inner write-through, no allocate on write
b111 = inner write-back, no allocate on write.
[3:2] OUTER Indicates the outer attributes from the translation table:
b00 = noncacheable
b01 = write-back, allocate on write
b10 = write-through, no allocate on write
b11 = write-back, no allocate on write.
[1] Supersection Indicates if the result is a supersection:
0 = page is not a supersection, that is, PAR [31:12] contains
PA[31:12], regardless of the page size.
1 = page is part of a supersection:
PAR[31:24] contains PA[31:24]
PAR[23:16] contains b00000000
PAR[15:12] contains b0000.
Note
PA[23:12] is the same as VA[23:12] for supersections.
[0] - Indicates that the translation succeeded:
0 = translation successful.
ARM DDI 0344K Copyright © 2006-2010 ARM Limited. All rights reserved. 3-72
ID060510 Non-Confidential