Cortex-A8 Technical Reference Manual - ARM Information Center

15.7.2 ITCHOUT, 0xEE4
15.7.3 ITTRIGOUT, 0xEE8
Cross Trigger Interface
ITCHOUT is a write-only register. This register controls signal outputs when bit [0] of the
Integration Mode Control Register is set to 1. Figure 15-18 shows the bit arrangement of the
ITCHOUT Register.
31 4 3 0
Reserved
CTCHOUT
Figure 15-18 ITCHOUT Register format
Table 15-19 shows how the bit values correspond with the ITCHOUT Register functions.
Table 15-19 ITCHOUT Register bit functions
Bits Field Function
[31:4] - Reserved, SBZ
[3:0] CTCHOUT Sets the value of the CTCHOUT outputs
ITTRIGOUT is a write-only register. This register controls signal outputs when bit [0] of the
Integration Mode Control Register is set to 1. Figure 15-19 shows the bit arrangement of the
ITTRIGOUT Register.
31 9 8 0
Reserved CTTRIGOUT
Figure 15-19 ITTRIGOUT Register format
Table 15-20 shows how the bit values correspond with the ITTRIGOUT Register functions.
Bits Field Function
Table 15-20 ITTRIGOUT Register bit functions
[31:9] - Reserved, SBZ
[8:0] CTTRIGOUT Sets the value of the CTTRIGOUT outputs
Each bit of the ITTRIGOUT Register corresponds to a trigger output. Table 15-21 shows how
some of the bits of ITTRIGOUT are connected to other integration test registers in the processor.
Table 15-21 ITTRIGOUT connections to other integration test registers
Bits Field Connected to Register name Address bit
[8] !nCTIIRQ - - -
[7] DBGRESTART Debug Integration Input Status Register, 0xEFC [11]
[6] PMUEXTIN[1] Debug Integration Input Status Register, 0xEFC [9]
[5] PMUEXTIN[0] Debug Integration Input Status Register, 0xEFC [8]
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