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Cortex-A8 Technical Reference Manual - ARM Information Center

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15.7.6 ITTRIGIN, 0xEF8<br />

Cross Trigger Interface<br />

31 4 3 0<br />

Reserved<br />

Figure 15-21 ITCHIN Register format<br />

Table 15-24 shows how the bit values correspond with the ITCHIN Register functions.<br />

CTCHIN<br />

Table 15-24 ITCHIN Register bit functions<br />

Bits Field Function<br />

[31:4] - Reserved, RAZ<br />

[3:0] CTCHIN Reads the values of the CTCHIN inputs<br />

ITTRIGIN is a read-only register. This register enables the values of signal inputs to be read<br />

when bit [0] of the Integration Mode Control Register is set to 1. Figure 15-22 shows the bit<br />

arrangement of the ITTRIGIN Register.<br />

31 9 8<br />

0<br />

Reserved<br />

CTTRIGIN<br />

Figure 15-22 ITTRIGIN Register format<br />

Table 15-25 shows how the bit values correspond with the ITTRIGIN Register functions.<br />

Bits Field Function<br />

Table 15-25 ITTRIGIN Register bit functions<br />

[31:9] - Reserved, RAZ<br />

[8:0] CTTRIGIN Reads the values of the CTTRIGIN inputs<br />

Each bit of the ITTRIGIN Register corresponds to a trigger input. Table 15-26 shows how some<br />

of the bits of ITTRIGIN are connected to other integration test registers in the processor.<br />

Table 15-26 ITTRIGIN connections to other integration test registers<br />

Bits Field Connected to Register name Address bit<br />

[8] - - - -<br />

[7] - - - -<br />

[6] TRIGGER ETM ITTRIGGER Register, 0xEE8 [0]<br />

[5] COMMTX Debug Integration Internal Output Control Register, 0xEF4 [2]<br />

[4] COMMRX Debug Integration Internal Output Control Register, 0xEF4 [1]<br />

[3] EXTOUT[1] ETM ITMISCOUT Register, 0xEDC [1]<br />

<strong>ARM</strong> DDI 0344K Copyright © 2006-2010 <strong>ARM</strong> Limited. All rights reserved. 15-22<br />

ID060510 Non-Confidential

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