Cortex-A8 Technical Reference Manual - ARM Information Center

12.3 Debug register interface
12.3.1 Coprocessor registers
12.3.2 CP14 access permissions
12.3.3 Coprocessor registers summary
Debug
You can access the debug register map using the APB interface. This is the only way to get full
access to the processor debug capability. ARM recommends that if your system requires the
processor to access its own debug registers, you choose a system interconnect structure that
enables the processor to access the APB interface by executing load and stores to a certain area
of physical memory.
Although most of the debug registers are accessible through the memory-mapped interface,
there are several registers that you can access through a coprocessor interface. This is important
for boot-strap access to the ARM register file. It enables software running on the processor to
identify the debug architecture version implemented by the device.
By default, you can access all CP14 debug registers from a nonprivileged mode. However, you
can program the processor to disable user-mode access to all coprocessor registers using bit [12]
of the DSCR, see CP14 c1, Debug Status and Control Register on page 12-15 for more
information. CP14 debug registers accesses are always permitted while the processor is in debug
state regardless of the processor mode.
Table 12-1 shows access to the CP14 debug registers.
Table 12-2 on page 12-6 shows the valid CP14 debug instructions for accessing the debug
registers. All CP14 debug instructions not listed are Undefined.
Note
The CP14 debug instructions are defined as having Opcode_1 set to 0.
Table 12-1 Access to CP14 debug registers
Debug state Processor mode DSCR[12] CP14 debug access
Yes X a
X Permitted
No User b0 Permitted
No User b1 Undefined
No Privileged X Permitted
a. X indicates a Don’t care condition. The outcome does not depend on this
condition.
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