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Cortex-A8 Technical Reference Manual - ARM Information Center

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12.4.18 Operating System Lock Status Register<br />

The OSLSR contains status information about the locked debug registers.<br />

Figure 12-15 shows the bit arrangement of the OSLSR.<br />

Debug<br />

Figure 12-15 OS Lock Status Register format<br />

Table 12-28 shows how the bit values correspond with the OS Lock Status Register functions.<br />

12.4.19 Operating System Save and Restore Register<br />

31 3<br />

Bits Field Function<br />

[31:3] - RAZ.<br />

Reserved<br />

The OSSRR is a 32-bit read/write register that enables an operating system to save (prior to<br />

power-up) or restore (after power-down) those debug registers that reside on the core power<br />

domain while the OS lock is set.<br />

Figure 12-16 shows the bit arrangement of the OSSRR.<br />

32-bit access<br />

Lock bit<br />

Lock implemented bit<br />

Table 12-28 OS Lock Status Register bit functions<br />

[2] 32-bit access Indicates that a 32-bit access is required to write the key to the OS Lock Access<br />

Register. This bit always reads 0.<br />

[1] Lock bit Locked bit:<br />

0 = lock is not set<br />

1 = lock is set.<br />

Writes are ignored. On Present, this bit initializes to the value of<br />

DBGOSLOCKINIT, that is, the OS lock is set if DBGOSLOCKINIT is HIGH.<br />

[0] Lock implemented bit Lock implemented bit. It indicates that the OS lock functionality is implemented. This<br />

bit always reads 1.<br />

31 0<br />

OS save and restore<br />

Figure 12-16 OS Save and Restore Register format<br />

<strong>ARM</strong> DDI 0344K Copyright © 2006-2010 <strong>ARM</strong> Limited. All rights reserved. 12-34<br />

ID060510 Non-Confidential<br />

2<br />

1<br />

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