Cortex-A8 Technical Reference Manual - ARM Information Center

}
// Step 9. Check for aborts.
aborted := CheckForAborts();
// Step 10. Read the final word from the DCC.
if (!aborted) *data := ReadDCC();
// Step 11. Restore the corrupted register r0.
WriteRegister(0, saved_r0);
Example 12-26 shows the sequence for writing a block of words to memory.
Debug
Example 12-26 Writing a block of words to memory (fast download)
WriteWords(uint32 address, bool &aborted, uint32 *data, int nwords)
{
// Step 1. Save the value of r0.
saved_r0 := ReadRegister(0);
// Step 2. Write the value 2'b10 to DSCR[21:20] for fast mode.
SetDTRAccessMode(2b10);
// Step 3. Write the opcode for MCR p14, 0, r0, c5, c0 to the ITR.
// Write stalls until the ITR is ready but the instruction is not issued.
WriteDebugRegister(33, 0xEE000E15);
// Step 4. Write the address to read from to the DTRRX
// Write stalls until the ITR is ready, but the instruction is not reissued.
WriteDebugRegister(33, address);
// Step 5. Write the opcode for STC p14, c5, [r0], 4 to the ITR.
// Write stalls until the ITR is ready but the instruction is not issued.
WriteDebugRegister(33, 0xED803E00);
// Step 6. Loop writing the data.
// Each time a word is written to the DTR, the instruction is reissued.
while (nwords > 0)
{
WriteDebugRegister(35, *data++);
--nwords;
}
// Step 7. Write the value 2'b00 to DSCR[21:20] for normal mode.
SetDTRAccessMode(2'b00);
// Step 8. Restore the corrupted register r0.
WriteRegister(0, saved_r0);
// Step 9. Check the DSCR for a sticky abort.
aborted := CheckForAborts();
}
Note
As the amount of data transferred increases, these functions reach an optimum performance of
one debug register access per data word transferred.
Accessing secure and nonsecure coprocessor registers
The sequence for accessing coprocessor registers is the same as for the PC and CPSR. That is,
you must first execute an instruction to transfer the register to an ARM register, then read the
value back through the DTR.
Example 12-27 on page 12-85 shows the sequence for reading a coprocessor register.
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