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RM0090: Reference manual - STMicroelectronics

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USB on-the-go full-speed (OTG_FS) <strong>RM0090</strong><br />

The HNP program model is described in detail in Section 30.17: OTG_FS programming<br />

model.<br />

30.4.3 SRP dual role device<br />

The SRP capable bit in the global USB configuration register (SRPCAP bit in<br />

OTG_FS_GUSBCFG) enables the OTG_FS core to switch off the generation of VBUS for the<br />

A-device to save power. Note that the A-device is always in charge of driving VBUS regardless of the host or peripheral role of the OTG_FS.<br />

the SRP A/B-device program model is described in detail in Section 30.17: OTG_FS<br />

programming model.<br />

30.5 USB peripheral<br />

This section gives the functional description of the OTG_FS in the USB peripheral mode.<br />

The OTG_FS works as an USB peripheral in the following circumstances:<br />

● OTG B-Peripheral<br />

– OTG B-device default state if B-side of USB cable is plugged in<br />

● OTG A-Peripheral<br />

– OTG A-device state after the HNP switches the OTG_FS to its peripheral role<br />

● B-device<br />

– If the ID line is present, functional and connected to the B-side of the USB cable,<br />

and the HNP-capable bit in the Global USB Configuration register (HNPCAP bit in<br />

OTG_FS_GUSBCFG) is cleared (see On-The-Go Rev1.3 par. 6.8.3).<br />

● Peripheral only (see Figure 358: USB peripheral-only connection)<br />

– The force device mode bit in the Global USB configuration register (FDMOD in<br />

OTG_FS_GUSBCFG) is set to 1, forcing the OTG_FS core to work as a USB<br />

peripheral-only (see On-The-Go Rev1.3 par. 6.8.3). In this case, the ID line is<br />

ignored even if present on the USB connector.<br />

Note: To build a bus-powered device implementation in case of the B-device or peripheral-only<br />

configuration, an external regulator has to be added that generates the VDD chip-supply<br />

from VBUS. The VBUS pin can be freed by disabling the VBUS sensing option. This is done by setting the<br />

NOVBUSSENS bit in the OTG_FS_GCCFG register. In this case the VBUS is considered<br />

internally to be always at VBUS valid level (5 V).<br />

1023/1416 Doc ID 018909 Rev 3

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