RM0090: Reference manual - STMicroelectronics

RM0090 General-purpose I/Os (GPIO)
Each I/O port bit is freely programmable, however the I/O port registers have to be accessed
as 32-bit words, half-words or bytes. The purpose of the GPIOx_BSRR register is to allow
atomic read/modify accesses to any of the GPIO registers. In this way, there is no risk of an
IRQ occurring between the read and the modify access.
Figure 17 shows the basic structure of a 5 V tolerant I/O port bit. Table 31 gives the possible
port bit configurations.
Figure 17. Basic structure of a five-volt tolerant I/O port bit
To on-chip
peripheral
Read
Write
Read/write
From on-chip
peripheral
1. V DD_FT is a potential specific to five-volt tolerant I/Os and different from V DD .
Table 27. Port bit configuration table (1)
MODER(i)
[1:0]
01
Bit set/reset registers
Analog
Alternate function input
Output data register
Input data register
Alternate function output
OTYPER(i)
Input driver
Output driver
OSPEEDR(i)
[B:A]
on/off
TTL Schmitt
trigger
Output
control
PUPDR(i)
[1:0]
Push-pull,
open-drain or
disabled
on/off
on/off
I/O configuration
0
0 0 GP output PP
0 0 1 GP output PP + PU
0 1 0 GP output PP + PD
0 SPEED 1 1 Reserved
1 [B:A]
0 0 GP output OD
1 0 1 GP output OD + PU
1 1 0 GP output OD + PD
1 1 1 Reserved (GP output OD)
V DD
V SS
P-MOS
N-MOS
Doc ID 018909 Rev 3 186/1416
V DD
V SS
Analog
Pull
up
Pull
down
V DD_FT (1)
V SS
Protection
diode
I/O pin
Protection
diode
ai15939b