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RM0090: Reference manual - STMicroelectronics

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Memory and bus architecture <strong>RM0090</strong><br />

Table 4. Memory mapping vs. Boot mode/physical remap (continued)<br />

Addresses<br />

Boot/Remap in<br />

main Flash memory<br />

0x0400 0000 - 0x07FF FFFF Reserved Reserved Reserved<br />

0x0000 0000 - 0x03FF<br />

FFFF (1)(2) Flash (1 MB) Aliased<br />

Boot/Remap in<br />

embedded SRAM<br />

SRAM1 (112 KB)<br />

Aliased<br />

59/1416 Doc ID 018909 Rev 3<br />

Boot/Remap in<br />

System memory<br />

System memory<br />

(30 KB) Aliased<br />

Remap in FSMC<br />

FSMC Bank1<br />

NOR/PSRAM 2<br />

(Aliased)<br />

FSMC Bank1<br />

NOR/PSRAM 1<br />

(Aliased)<br />

1. When the FSMC is remapped at address 0x0000 0000, only the first two regions of Bank 1 memory controller (Bank1<br />

NOR/PSRAM 1 and NOR/PSRAM 2) can be remapped. In remap mode, the CPU can access the external memory via<br />

ICode bus instead of System bus which boosts up the performance.<br />

2. Even when aliased in the boot memory space, the related memory is still accessible at its original memory space.

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