RM0090: Reference manual - STMicroelectronics

RM0090 Debug support (DBG)
Bits 15:2 Reserved, must be kept at reset value.
Bit 1 DBG_TIM8_STOP: TIM8 counter stopped when core is halted
0: The clock of the involved Timer Counter is fed even if the core is halted
1: The clock of the involved Timer counter is stopped when the core is halted
Bit 0 DBG_TIM1_STOP: TIM1 counter stopped when core is halted
0: The clock of the involved Timer Counter is fed even if the core is halted
1: The clock of the involved Timer counter is stopped when the core is halted
33.17 TPIU (trace port interface unit)
33.17.1 Introduction
The TPIU acts as a bridge between the on-chip trace data from the ITM and the ETM.
The output data stream encapsulates the trace source ID, that is then captured by a trace
port analyzer (TPA).
The core embeds a simple TPIU, especially designed for low-cost debug (consisting of a
special version of the CoreSight TPIU).
Figure 427. TPIU block diagram
CLK domain
ETM
ITM
External PPB bus
Asynchronous
FIFO
Asynchronous
FIFO
TPIU
TPIU
formatter
TRACECLKIN domain
Trace out
(serializer)
TRACECLKIN
TRACECK
TRACEDATA
[3:0]
TRACESWO
ai17114
Doc ID 018909 Rev 3 1392/1416