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RM0090: Reference manual - STMicroelectronics

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USB on-the-go high-speed (OTG_HS) <strong>RM0090</strong><br />

CHH interrupt.<br />

e) In response to the CHH interrupt, set the COMPLSPLT bit in HCSPLT1 to send the<br />

complete split.<br />

f) After successfully completing the complete split transaction, the OTG_HS host<br />

generates the CHH interrupt.<br />

g) In response to CHH interrupt, de-allocate the channel.<br />

● Interrupt IN split transactions in DMA mode<br />

The sequence of operations in (channel x) is as follows:<br />

a) Initialize and enable channel x for start split as explained in Section : Channel<br />

initialization.<br />

b) The OTG_HS host writes an IN request to the request queue as soon as channel x<br />

receives the grant from the arbiter.<br />

c) The OTG_HS host attempts to send the start split IN token at the beginning of the<br />

next odd micro-frame.<br />

d) The OTG_HS host generates the CHH interrupt after successfully transmitting the<br />

start split IN token.<br />

e) In response to the CHH interrupt, set the COMPLSPLT bit in HCSPLT2 to send the<br />

complete split.<br />

f) As soon as the packet is received successfully, the OTG_HS host starts writing the<br />

data to the system memory.<br />

g) The OTG_HS host generates the CHH interrupt after transferring the received<br />

data to the system memory.<br />

h) In response to the CHH interrupt, de-allocate or reinitialize the channel for the next<br />

start split.<br />

● Isochronous OUT split transactions in DMA mode<br />

The sequence of operations (channel x) is as follows:<br />

a) Initialize and enable channel x for start split (begin) as explained in Section :<br />

Channel initialization. The application must set the ODDFRM bit in HCCHAR1.<br />

Program the MPS field.<br />

b) The HS_OTG host starts reading the packet.<br />

c) After successfully transmitting the start split (begin), the HS_OTG host generates<br />

the CHH interrupt.<br />

d) In response to the CHH interrupt, reinitialize the registers to send the start split<br />

(end).<br />

e) After successfully transmitting the start split (end), the OTG_HS host generates a<br />

CHH interrupt.<br />

f) In response to the CHH interrupt, de-allocate the channel.<br />

● Isochronous IN split transactions in DMA mode<br />

The sequence of operations (channel x) is as follows:<br />

a) Initialize and enable channel x for start split as explained in Section : Channel<br />

initialization.<br />

b) The OTG_HS host writes an IN request to the request queue as soon as channel x<br />

receives the grant from the arbiter.<br />

c) The OTG_HS host attempts to send the start split IN token at the beginning of the<br />

next odd micro-frame.<br />

1285/1416 Doc ID 018909 Rev 3

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