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RM0090: Reference manual - STMicroelectronics

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General-purpose timers (TIM9 to TIM14) <strong>RM0090</strong><br />

Figure 177. Control circuit in external clock mode 1<br />

Counter clock = CK_CNT = CK_PSC<br />

16.4.4 Capture/compare channels<br />

Each Capture/Compare channel is built around a capture/compare register (including a<br />

shadow register), a input stage for capture (with digital filter, multiplexing and prescaler) and<br />

an output stage (with comparator and output control).<br />

Figure 178 to Figure 180 give an overview of one capture/compare channel.<br />

The input stage samples the corresponding TIx input to generate a filtered signal TIxF.<br />

Then, an edge detector with polarity selection generates a signal (TIxFPx) which can be<br />

used as trigger input by the slave mode controller or as the capture command. It is<br />

prescaled before the capture register (ICxPS).<br />

Figure 178. Capture/compare channel (example: channel 1 input stage)<br />

TI1<br />

f DTS<br />

filter<br />

downcounter<br />

ICF[3:0]<br />

TIMx_CCMR1<br />

The output stage generates an intermediate waveform which is then used for reference:<br />

OCxRef (active high). The polarity acts at the end of the chain.<br />

487/1416 Doc ID 018909 Rev 3<br />

TI2<br />

CNT_EN<br />

Counter register 34<br />

35 36<br />

TI1F<br />

TIF<br />

Edge<br />

Detector<br />

TI1F_Rising<br />

TI1F_Falling<br />

CC1P/CC1NP<br />

TIMx_CCER<br />

TI2F_rising<br />

(from channel 2)<br />

TI2F_falling<br />

(from channel 2)<br />

Write TIF=0<br />

0<br />

1<br />

0<br />

1<br />

TI1FP1<br />

TI1F_ED<br />

TI2FP1<br />

to the slave mode controller<br />

01<br />

10<br />

TRC<br />

(from slave mode<br />

controller)<br />

11<br />

CC1S[1:0]<br />

IC1<br />

ICPS[1:0]<br />

TIMx_CCMR1<br />

divider<br />

/1, /2, /4, /8<br />

CC1E<br />

IC1PS<br />

TIMx_CCER

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