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RM0090: Reference manual - STMicroelectronics

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USB on-the-go high-speed (OTG_HS) <strong>RM0090</strong><br />

OTG_HS Host frame interval register (OTG_HS_HFIR)<br />

Address offset: 0x404<br />

Reset value: 0x0000 EA60<br />

This register stores the frame interval information for the current speed to which the<br />

OTG_HS controller has enumerated.<br />

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0<br />

Reserved<br />

Bits 31:16 Reserved, must be kept at reset value.<br />

OTG_HS host frame number/frame time remaining register (OTG_HS_HFNUM)<br />

Address offset: 0x408<br />

Reset value: 0x0000 3FFF<br />

This register indicates the current frame number. It also indicates the time remaining (in<br />

terms of the number of PHY clocks) in the current frame.<br />

1205/1416 Doc ID 018909 Rev 3<br />

FRIVL<br />

rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw<br />

Bits 15:0 FRIVL: Frame interval<br />

The value that the application programs to this field specifies the interval between two<br />

consecutive SOFs (FS), micro-SOFs (HS) or Keep-Alive tokens (LS). This field contains the<br />

number of PHY clocks that constitute the required frame interval. The application can write a<br />

value to this register only after the Port enable bit of the host port control and status register<br />

(PENA bit in OTG_HS_HPRT) has been set. If no value is programmed, the core calculates<br />

the value based on the PHY clock specified in the FS/LS PHY Clock Select field of the Host<br />

configuration register (FSLSPCS in OTG_HS_HCFG):<br />

frame duration × PHY clock frequency<br />

Note: The FRIVL bit can be modified whenever the application needs to change the Frame<br />

interval time.<br />

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0<br />

FTREM FRNUM<br />

r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r r<br />

Bits 31:16 FTREM: Frame time remaining<br />

Indicates the amount of time remaining in the current frame, in terms of PHY clocks. This<br />

field decrements on each PHY clock. When it reaches zero, this field is reloaded with the<br />

value in the Frame interval register and a new SOF is transmitted on the USB.<br />

Bits 15:0 FRNUM: Frame number<br />

This field increments when a new SOF is transmitted on the USB, and is cleared to 0 when<br />

it reaches 0x3FFF.

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