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RM0090: Reference manual - STMicroelectronics

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Power control (PWR) <strong>RM0090</strong><br />

mode (see Section 5.4.1: PWR power control register (PWR_CR) for STM32F40x<br />

and STM32F41x.<br />

– For STM32F42x and STM32F43x<br />

Scale 1, scale 2, or scale 3 can be configured through VOS[1:0] bits of the<br />

PWR_CR register). The scale can be modified only when the PLL is OFF and the<br />

HSI or HSE clock source is selected as system clock source. Voltage scale 3 is<br />

automatically selected when PLL is OFF. (see Section 5.4.2: PWR power control<br />

register (PWR_CR) for STM32F42x and STM32F43x).<br />

The voltage scaling allows optimizing the power consumption when the device is<br />

clocked below the maximum system frequency.<br />

● In Stop mode the regulator supplies low power to the 1.2 V domain, preserving the<br />

content of registers and internal SRAM.<br />

● In Standby mode, the regulator is powered down. The content of the registers and<br />

SRAM are lost except for the Standby circuitry and the backup domain.<br />

Note: For more details, refer to the voltage regulator section in the STM32F4xx datasheets.<br />

5.2 Power supply supervisor<br />

5.2.1 Power-on reset (POR)/power-down reset (PDR)<br />

The device has an integrated POR/PDR circuitry that allows proper operation starting from<br />

to 1.8 V.<br />

The device remains in Reset mode when VDD /VDDA is below a specified threshold,<br />

VPOR/PDR , without the need for an external reset circuit. For more details concerning the<br />

power on/power-down reset threshold, refer to the electrical characteristics of the datasheet.<br />

Figure 9. Power-on reset/power-down reset waveform<br />

VDD/VDDA<br />

Reset<br />

PDR<br />

40 mV<br />

hysteresis<br />

Temporization<br />

tRSTTEMPO<br />

95/1416 Doc ID 018909 Rev 3<br />

PDR<br />

MS30431V1

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