RM0090: Reference manual - STMicroelectronics

Advanced-control timers (TIM1&TIM8) RM0090
The following figures show some examples of the counter behavior for different clock
frequencies when TIMx_ARR=0x36.
Figure 80. Counter timing diagram, internal clock divided by 1
CK_PSC
CNT_EN
Timer clock = CK_CNT
Counter register
Counter underflow (cnt_udf)
Update event (UEV)
Update interrupt flag (UIF)
Figure 81. Counter timing diagram, internal clock divided by 2
CK_PSC
CNT_EN
Timer clock = CK_CNT
Counter register
Counter underflow
Update event (UEV)
Update interrupt flag (UIF)
Figure 82. Counter timing diagram, internal clock divided by 4
CK_PSC
CNT_EN
Timer clock = CK_CNT
Counter register
Counter underflow
Update event (UEV)
Update interrupt flag (UIF)
357/1416 Doc ID 018909 Rev 3
05
04 03 02 01 00 36 35 34 33 32 31 30 2F
0002 0001 0000 0036 0035 0034 0033
0001 0000
0036 0035