09.12.2012 Views

RM0090: Reference manual - STMicroelectronics

RM0090: Reference manual - STMicroelectronics

RM0090: Reference manual - STMicroelectronics

SHOW MORE
SHOW LESS

You also want an ePaper? Increase the reach of your titles

YUMPU automatically turns print PDFs into web optimized ePapers that Google loves.

<strong>RM0090</strong> USB on-the-go high-speed (OTG_HS)<br />

1. To receive a SETUP packet, the STUPCNT field (OTG_HS_DOEPTSIZx) in a control<br />

OUT endpoint must be programmed to a nonzero value. When the application<br />

programs the STUPCNT field to a nonzero value, the core receives SETUP packets<br />

and writes them to the receive FIFO, irrespective of the NAK status and EPENA bit<br />

setting in OTG_HS_DOEPCTLx. The STUPCNT field is decremented every time the<br />

control endpoint receives a SETUP packet. If the STUPCNT field is not programmed to<br />

a proper value before receiving a SETUP packet, the core still receives the SETUP<br />

packet and decrements the STUPCNT field, but the application may not be able to<br />

determine the correct number of SETUP packets received in the Setup stage of a<br />

control transfer.<br />

– STUPCNT = 3 in OTG_HS_DOEPTSIZx<br />

2. The application must always allocate some extra space in the Receive data FIFO, to be<br />

able to receive up to three SETUP packets on a control endpoint.<br />

– The space to be reserved is 10 DWORDs. Three DWORDs are required for the<br />

first SETUP packet, 1 DWORD is required for the Setup stage done DWORD and<br />

6 DWORDs are required to store two extra SETUP packets among all control<br />

endpoints.<br />

– 3 DWORDs per SETUP packet are required to store 8 bytes of SETUP data and 4<br />

bytes of SETUP status (Setup packet pattern). The core reserves this space in the<br />

receive data.<br />

– FIFO to write SETUP data only, and never uses this space for data packets.<br />

3. The application must read the 2 DWORDs of the SETUP packet from the receive FIFO.<br />

4. The application must read and discard the Setup stage done DWORD from the receive<br />

FIFO.<br />

● Internal data flow<br />

5. When a SETUP packet is received, the core writes the received data to the receive<br />

FIFO, without checking for available space in the receive FIFO and irrespective of the<br />

endpoint’s NAK and STALL bit settings.<br />

– The core internally sets the IN NAK and OUT NAK bits for the control IN/OUT<br />

endpoints on which the SETUP packet was received.<br />

6. For every SETUP packet received on the USB, 3 DWORDs of data are written to the<br />

receive FIFO, and the STUPCNT field is decremented by 1.<br />

– The first DWORD contains control information used internally by the core<br />

– The second DWORD contains the first 4 bytes of the SETUP command<br />

– The third DWORD contains the last 4 bytes of the SETUP command<br />

7. When the Setup stage changes to a Data IN/OUT stage, the core writes an entry<br />

(Setup stage done DWORD) to the receive FIFO, indicating the completion of the Setup<br />

stage.<br />

8. On the AHB side, SETUP packets are emptied by the application.<br />

9. When the application pops the Setup stage done DWORD from the receive FIFO, the<br />

core interrupts the application with an STUP interrupt (OTG_HS_DOEPINTx),<br />

indicating it can process the received SETUP packet.<br />

– The core clears the endpoint enable bit for control OUT endpoints.<br />

● Application programming sequence<br />

Doc ID 018909 Rev 3 1290/1416

Hooray! Your file is uploaded and ready to be published.

Saved successfully!

Ooh no, something went wrong!