RM0090: Reference manual - STMicroelectronics

RM0090 USB on-the-go full-speed (OTG_FS)
Figure 369. Bulk/control IN transactions
init_reg(ch_2)
set_ch_en
(ch_2)
set_ch_en
(ch_2)
set_ch_en
(ch_2)
read_rx_sts
read_rx_fifo
set_ch_en
(ch_2)
read_rx_stsre
ad_rx_fifo
read_rx_sts
Disable
(ch_2)
De-allocate
(ch_2)
1
1
2
2
5
5
7
7
9
Application AHB Host
USB Device
init_reg(ch_1)
write_tx_fifo
(ch_1)
write_tx_fifo
(ch_1)
De-allocate
(ch_1)
1
MPS
1
MPS
1
MPS
1
MPS
read_rx_sts 11
10
CHH interrupt r
13
RXFLVL interrupt
XFRC interrupt
RXFLVL interrupt
RXFLVL interrupt
XFRC interrupt
RXFLVL interrupt
The sequence of operations is as follows:
a) Initialize channel 2.
b) Set the CHENA bit in HCCHAR2 to write an IN request to the non-periodic request
queue.
c) The core attempts to send an IN token after completing the current OUT
transaction.
d) The core generates an RXFLVL interrupt as soon as the received packet is written
to the receive FIFO.
e) In response to the RXFLVL interrupt, mask the RXFLVL interrupt and read the
received packet status to determine the number of bytes received, then read the
receive FIFO accordingly. Following this, unmask the RXFLVL interrupt.
8
6
3
6
12
4
ch_1
ch_2
ch_1
ch_2
3
ch_1
ch_2
ch_2
ch_2
ch_2
4
Non-Periodic Request
Queue
Assume that this queue
can hold 4 entries.
Doc ID 018909 Rev 3 1118/1416
OUT
DATA0
MPS
ACK
IN
DATA0
ACK
OUT
DATA1
MPS
ACK
IN
DATA1
ACK
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