RM0090: Reference manual - STMicroelectronics

RM0090 Universal synchronous asynchronous receiver transmitter (USART)
Figure 252. Mute mode using Idle line detection
RX Data 1 Data 2 Data 3 Data 4 IDLE
Data 5 Data 6
RWU
RWU written to 1
Address mark detection (WAKE=1)
Mute Mode Normal Mode
Idle frame detected
In this mode, bytes are recognized as addresses if their MSB is a ‘1 else they are
considered as data. In an address byte, the address of the targeted receiver is put on the 4
LSB. This 4-bit word is compared by the receiver with its own address which is programmed
in the ADD bits in the USART_CR2 register.
The USART enters mute mode when an address character is received which does not
match its programmed address. In this case, the RWU bit is set by hardware. The RXNE flag
is not set for this address byte and no interrupt nor DMA request is issued as the USART
would have entered mute mode.
It exits from mute mode when an address character is received which matches the
programmed address. Then the RWU bit is cleared and subsequent bytes are received
normally. The RXNE bit is set for the address character since the RWU bit has been cleared.
The RWU bit can be written to as 0 or 1 when the receiver buffer contains no data (RXNE=0
in the USART_SR register). Otherwise the write attempt is ignored.
An example of mute mode behavior using address mark detection is given in Figure 253.
Figure 253. Mute mode using address mark detection
In this example, the current address of the receiver is 1
(programmed in the USART_CR2 register)
RX IDLE Addr=0
RWU
RWU written to 1
(RXNE was cleared)
RXNE
RXNE RXNE
Mute Mode Normal Mode
RXNE RXNE
Data 1 Data 2 IDLE Addr=1 Data 3 Data 4 Addr=2 Data 5
Mute Mode
nonmatching address Matching address nonmatching address
Doc ID 018909 Rev 3 762/1416