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RM0090: Reference manual - STMicroelectronics

RM0090: Reference manual - STMicroelectronics

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<strong>RM0090</strong> Reset and clock control for (RCC)<br />

Bit 21 DMA1LPEN: DMA1 clock enable during Sleep mode<br />

Set and cleared by software.<br />

0: DMA1 clock disabled during Sleep mode<br />

1: DMA1 clock enabled during Sleep mode<br />

Bit 20 Reserved, must be kept at reset value.<br />

Bit 19 SRAM3LPEN: SRAM3 interface clock enable during Sleep mode<br />

Set and cleared by software.<br />

0: SRAM3 interface clock disabled during Sleep mode<br />

1: SRAM3 interface clock enabled during Sleep mode<br />

Bit 18 BKPSRAMLPEN: Backup SRAM interface clock enable during Sleep mode<br />

Set and cleared by software.<br />

0: Backup SRAM interface clock disabled during Sleep mode<br />

1: Backup SRAM interface clock enabled during Sleep mode<br />

Bit 17 SRAM2LPEN: SRAM2 interface clock enable during Sleep mode<br />

Set and cleared by software.<br />

0: SRAM2 interface clock disabled during Sleep mode<br />

1: SRAM2 interface clock enabled during Sleep mode<br />

Bit 16 SRAM1LPEN: SRAM1interface clock enable during Sleep mode<br />

Set and cleared by software.<br />

0: SRAM1 interface clock disabled during Sleep mode<br />

1: SRAM1 interface clock enabled during Sleep mode<br />

Bit 15 FLITFLPEN: Flash interface clock enable during Sleep mode<br />

Set and cleared by software.<br />

0: Flash interface clock disabled during Sleep mode<br />

1: Flash interface clock enabled during Sleep mode<br />

Bits 14:13 Reserved, must be kept at reset value.<br />

Bit 12 CRCLPEN: CRC clock enable during Sleep mode<br />

Set and cleared by software.<br />

0: CRC clock disabled during Sleep mode<br />

1: CRC clock enabled during Sleep mode<br />

Bits 11:9 Reserved, must be kept at reset value.<br />

Bit 8 GPIOILPEN: IO port I clock enable during Sleep mode<br />

Set and cleared by software.<br />

0: IO port I clock disabled during Sleep mode<br />

1: IO port I clock enabled during Sleep mode<br />

Bit 7 GPIOHLPEN: IO port H clock enable during Sleep mode<br />

Set and cleared by software.<br />

0: IO port H clock disabled during Sleep mode<br />

1: IO port H clock enabled during Sleep mode<br />

Bits 6 GPIOGLPEN: IO port G clock enable during Sleep mode<br />

Set and cleared by software.<br />

0: IO port G clock disabled during Sleep mode<br />

1: IO port G clock enabled during Sleep mode<br />

Doc ID 018909 Rev 3 162/1416

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