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RM0090: Reference manual - STMicroelectronics

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<strong>RM0090</strong> Hash processor (HASH)<br />

Once this is done, writing into HASH_STR with bit DCAL = 1 starts the processing of the last<br />

entered block of message by the hash processor. This processing consists in:<br />

● Automatically performing the message padding operation: the purpose of this operation<br />

is to make the total length of a padded message a multiple of 512. The HASH<br />

sequentially processes blocks of 512 bits when computing the message digest<br />

● Computing the final message digest<br />

When the DMA is enabled, it provides the information to the hash processor when it is<br />

transferring the last data word. Then the padding and digest computation are performed<br />

automatically as if DCAL had been written to 1.<br />

22.3.4 Message padding<br />

Message padding consists in appending a “1” followed by m “0”s followed by a 64-bit integer<br />

to the end of the original message to produce a padded message block of length 512. The<br />

“1” is added to the last word written into the HASH_DIN register at the bit position defined by<br />

the NBLW bitfield, and the remaining upper bits are cleared (“0”s).<br />

Example: let us assume that the original message is the ASCII binary-coded form of “abc”,<br />

of length L = 24:<br />

byte 0 byte 1 byte 2 byte 3<br />

01100001 01100010 01100011 UUUUUUUU<br />

<br />

NBLW has to be loaded with the value 24: a “1” is appended at bit location 24 in the bit string<br />

(starting counting from left to right in the above bit string), which corresponds to bit 31 in the<br />

HASH_DIN register (little-endian convention):<br />

01100001 01100010 01100011 1UUUUUUU<br />

Since L = 24, the number of bits in the above bit string is 25, and 423 “0”s are appended,<br />

making now 448. This gives (in hexadecimal, big-endian format):<br />

61626380 00000000 00000000 00000000<br />

00000000 00000000 00000000 00000000<br />

00000000 00000000 00000000 00000000<br />

00000000 00000000<br />

The L value, in two-word representation (that is 00000000 00000018) is appended. Hence<br />

the final padded message in hexadecimal:<br />

61626380 00000000 00000000 00000000<br />

00000000 00000000 00000000 00000000<br />

00000000 00000000 00000000 00000000<br />

00000000 00000000 00000000 00000028<br />

If the HASH is programmed to use the little-endian byte input format, the above message<br />

has to be entered by doing the following steps:<br />

1. 0xUU636261 is written into the HASH_DIN register (where ‘U’ means don’t care)<br />

2. 0x18 is written into the HASH_STR register (the number of valid bits in the last word<br />

written into the HASH_DIN register is 24, as the original message length is 24 bits)<br />

3. 0x10 is written into the HASH_STR register to start the message padding and digest<br />

computation. When NBLW ≠ 0x00, the message padding puts a “1” into the HASH_DIN<br />

register at the bit position defined by the NBLW value, and inserts “0”s at bit locations<br />

[31:(NBLW+1)]. When NBLW == 0x00, the message padding inserts one new word<br />

Doc ID 018909 Rev 3 600/1416

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