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RM0090: Reference manual - STMicroelectronics

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<strong>RM0090</strong> USB on-the-go full-speed (OTG_FS)<br />

Bit 15 EPDIR: Endpoint direction<br />

Indicates whether the transaction is IN or OUT.<br />

0: OUT<br />

1: IN<br />

Bits 14:11 EPNUM: Endpoint number<br />

Indicates the endpoint number on the device serving as the data source or sink.<br />

Bits 10:0 MPSIZ: Maximum packet size<br />

Indicates the maximum packet size of the associated endpoint.<br />

OTG_FS Host channel-x interrupt register (OTG_FS_HCINTx) (x = 0..7, where<br />

x = Channel_number)<br />

Address offset: 0x508 + (Channel_number × 0x20)<br />

Reset value: 0x0000 0000<br />

This register indicates the status of a channel with respect to USB- and AHB-related events.<br />

It is shown in Figure 364. The application must read this register when the host channels<br />

interrupt bit in the Core interrupt register (HCINT bit in OTG_FS_GINTSTS) is set. Before<br />

the application can read this register, it must first read the host all channels interrupt<br />

(OTG_FS_HAINT) register to get the exact channel number for the host channel-x interrupt<br />

register. The application must clear the appropriate bit in this register to clear the<br />

corresponding bits in the OTG_FS_HAINT and OTG_FS_GINTSTS registers.<br />

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0<br />

Reserved DTERR<br />

Bits 31:11 Reserved, must be kept at reset value.<br />

Bit 10 DTERR: Data toggle error<br />

Bit 9 FRMOR: Frame overrun<br />

Bit 8 BBERR: Babble error<br />

Bit 7 TXERR: Transaction error<br />

Indicates one of the following errors occurred on the USB.<br />

CRC check failure<br />

Timeout<br />

Bit stuff error<br />

False EOP<br />

Bit 6 Reserved, must be kept at reset value.<br />

Bit 5 ACK: ACK response received/transmitted interrupt<br />

Bit 4 NAK: NAK response received interrupt<br />

Bit 3 STALL: STALL response received interrupt<br />

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FRMOR<br />

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Doc ID 018909 Rev 3 1076/1416<br />

BBERR<br />

rc_<br />

w1<br />

TXERR<br />

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w1<br />

Reserved<br />

ACK<br />

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NAK<br />

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STALL<br />

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Reserved<br />

CHH<br />

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XFRC<br />

rc_<br />

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